xilinx

There are 25 repositories under xilinx topic.

LeiWang1999 / FPGA
帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
fpga xilinx verilog vivado pynq
4048
openwifi
open-sdr / openwifi
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
802-11 ad9361 analog-devices csma dma fpga hardware hls ieee80211 linux mac80211 ofdm openwifi sdr software-defined-radio verilog wifi xilinx xilinx-fpga zynq
Language:C 3886
pConst / basic_verilog
Must-have verilog systemverilog modules
altera debounce delay encoder fifo fpga hls pwm spi-interface spi-master synchronizer tcl uart uart-controller uart-protocol uart-receiver uart-tx uart-verilog verilog xilinx
Language:Verilog 1657
trabucayre / openFPGALoader
Universal utility for programming FPGA
gowin trenz-gowin-littlebee lattice fpga arty bitstream cyclone intel xilinx
Language:C++ 1219
Xilinx / brevitas
Brevitas: neural network quantization in PyTorch
brevitas deep-learning fpga hardware-acceleration neural-networks ptq pytorch qat quantization xilinx
Language:Python 1204
hdl-util / hdmi
Send video/audio over HDMI on an FPGA
altera audio dvi fpga hdlmake hdmi intel quartus systemverilog video vivado xilinx
Language:SystemVerilog 1094
ultraembedded / biriscv
32-bit Superscalar RISC-V CPU
risc-v rv32i rv32im superscalar cpu fpga verilog pipelined-processors verilator coremark asic branch-prediction in-order linux riscv-linux xilinx artix-7
Language:Verilog 867
eugene-tarassov / vivado-risc-v
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
arty-a7 boom fpga genesys2 kc705 linux nexys-video risc-v riscv rocketchip vc707 vivado xilinx
Language:Tcl 850
prjxray
f4pga / prjxray
Documenting the Xilinx 7-series bit-stream format.
fpga xilinx xilinx-fpga artix artix7 kintex7 bitstream tools toolchain fuzzer vivado symbiflow
Language:Python 774
Cr4sh / s6_pcie_microblaze
PCI Express DIY hacking toolkit for Xilinx SP605. This repository is also home of Hyper-V Backdoor and Boot Backdoor, check readme for links and info
backdoor dma fpga hyper-v hypervisor kernel microblaze pci-e rootkit uefi xilinx
Language:C 742
open-sdr / openwifi-hw
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware
ad9361 analog-devices csma dma fpga hardware hls ieee80211 linux mac80211 ofdm rtl sdr software-defined-radio verilog vhdl wi-fi xilinx zynq
Language:Verilog 701
olofk / edalize
An abstraction library for interfacing EDA tools
eda fpga fossi xilinx altera lattice yosys synthesis simulation verilog vhdl systemverilog verilator icarus-verilog modelsim riviera-pro ghdl icestorm spyglass vivado
Language:Python 645
trivialmips / nontrivial-mips
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
cpu fpga fpga-soc fpga-soc-linux mips systemverilog xilinx
Language:SystemVerilog 574
VLSI-EDA / PoC
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
vhdl poc-library python simulation synthesis verification vlsi testbenches hardware-modules fpga hardware-libraries hardware-designs asic altera xilinx lattice osvvm uvvm vunit regression-testing
Language:VHDL 551
Vitis_Accel_Examples
Xilinx / Vitis_Accel_Examples
Vitis_Accel_Examples
acap alveo fpga-programming soc vitis xilinx zynq
Language:Makefile 506
ZipCPU / wb2axip
Bus bridges and other odds and ends
axi-bus fpga gplv3 wishbone wishbone-bus xilinx xilinx-vivado
Language:Verilog 490
bperez77 / xilinx_axidma
A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.
axi-dma axi-vdma dma-driver driver fpga fpga-dma linux-driver userspace-dma xilinx xilinx-axi-dma xilinx-axi-vdma zedboard
Language:C 472
WangXuan95 / Xilinx-FPGA-PCIe-XDMA-Tutorial
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
dma-subsystem-for-pcie fpga mpeg2 mpeg2-encoder pcie pcie-xdma xdma xilinx
Language:Batchfile 463
f32c / f32c
A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz
fpga altera lattice xilinx riscv mips arduino
Language:C 404
jofrfu / tinyTPU
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
fpga fpga-accelerator tensorflow tensor tpu vhdl zynq xilinx vivado assembly hardware-description-language hardware-designs hardware-acceleration hardware-architectures verilog ip-core embedded-systems linux internet-of-things iot
Language:VHDL 402
Xilinx / SDAccel_Examples
SDAccel Examples
opencl sdaccel fpga nimbix aws c cpp xilinx sdx
Language:C++ 356
pavel-demin / red-pitaya-notes
Notes on the Red Pitaya Open Source Instrument
dsp fpga linux mca nmr radio red-pitaya redpitaya sdr tcl verilog vitis vivado vna wspr xilinx zynq
Language:Tcl 338
Xilinx / CHaiDNN
HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
alexnet deep-neural-networks dnn embedded-vision googlenet inference xilinx xilinx-ultrascale-mpsocs
Language:C++ 323
definelicht / hlslib
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
cmake fpga high-level-synthesis hpc intel-fpga intel-fpga-opencl sdaccel vitis vivado-hls xilinx
Language:C++ 303
Xilinx / RapidWright
Build Customized FPGA Implementations for Vivado
xilinx rapidwright fpga vivado
Language:Java 294
lastweek / fpga_readings
Recipe for FPGA cooking
verilog fpga hls rtl xilinx vivado-hls
Language:Verilog 289
tymonx / logic
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
asic cmake cpp fpga hdl modelsim quartus rtl systemc systemverilog testing-rtl unit-tests uvm verification verilator verilog vivado xilinx
Language:SystemVerilog 271
suoto / hdl_checker
Repurposing existing HDL tools to help writing better code
vhdl modelsim xilinx verilog systemverilog python hdl xilinx-vivado syntax-checker lsp-server vivado-simulator ghdl vim hdl-checker language-server coc-nvim questasim mentor-msim vim-ale emacs-lsp
Language:Python 193
fpgasystems / Vitis_with_100Gbps_TCP-IP
100 Gbps TCP/IP stack for Vitis shells
network-kernel tcp vitis xilinx
Language:C++ 184
MeowLucian / SDR_Matlab_OFDM_802.11a
:satellite: Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz
matlab zedboard ad9361 ofdm ieee80211a qpsk fmcomms3 fmcomms zynq xilinx analog-device 80211 sdr xilinx-zynq hardware radio gui preamble packets
Language:MATLAB 162
Xtra-Computing / ThunderGP
HLS-based Graph Processing Framework on FPGAs
accelerators fpgas graph-analytic-algorithm graph-processing hls programmability xilinx
Language:C++ 139
Xilinx / xup_vitis_network_example
VNx: Vitis Network Examples
vitis alveo xilinx networking vitis-network vnx alveo-card
Language:Jupyter Notebook 137
19801201 / SpinalHDL_CNN_Accelerator
CNN accelerator implemented with Spinal HDL
cnn fpga object-detection spinalhdl xilinx yolo
Language:Scala 136
UCLA-VAST / AutoBridge
[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
vivado-hls hls-compilation hls-designs fpga frequency floorplan xilinx
Language:C++ 121
cea-wind / SimpleTPU
A FPGA Based CNN accelerator, following Google's TPU V1.
cnn accelerator tpu cnn-accelerator fpga xilinx hls synthesis
Language:C++ 120
z4yx / petalinux-docker
Dockerfile to build docker images with Petalinux (Tested on version 2018.3~2021.1)
docker petalinux xilinx
Language:Dockerfile 114