TrivialMIPS (trivialmips)

TrivialMIPS

trivialmips

Organization data from Github https://github.com/trivialmips

TrivialMIPS is nontrivial!

GitHub:@trivialmips

TrivialMIPS's repositories

nontrivial-mips

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

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TrivialMIPS

MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support

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linux-nontrivial-mips

Linux porting to NonTrivialMIPS (based on linux-stable)

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TrivialMIPS_Software

Baremetal softwares for TrivialMIPS platform

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u-boot-trivialmips

u-boot port of TrivialMIPS CPU on different boards

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ucore-thumips

uCore MIPS32 porting

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trivial-dashboard

Showcase application for NSCSCC19

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nontrivial-mips-buildroot

Buildroot customizations and defconf for NonTrivial-MIPS

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openssl

OpenSSL with ASIC-accelerated AES support by NonTrivialMIPS

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