axi-bus

There are 0 repository under axi-bus topic.

ZipCPU / wb2axip
Bus bridges and other odds and ends
fpga wishbone wishbone-bus axi-bus xilinx xilinx-vivado gplv3
Language:Verilog 502
mnemocron / axi-perf-counter-pattern
Performance counter to measure latency between two AXI Stream interfaces with pattern matching as trigger.
axi-bus axi-stream axi4 latency-analysis performance-analysis vhdl
Language:VHDL 1
vacagonzalo / soc-workflow-vhdl
Example workflow project for VHDL development.
axi axi-bus cocotb cocotb-testing tcl tcl-scripts vhdl vivado workflow
Language:VHDL 1
marchese / aximemcomp
This is a hardware project of an inline memory compressor that reduces the amount of memory used by embedded systems
compressor hardware vhdl arm zynq-7000 fpga axi-bus verilog tcl
Language:VHDL 0

ZipCPU / wb2axip