There are 7 repositories under spinalhdl topic.
CNN accelerator implemented with Spinal HDL
[HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning
客制化机械键盘——从0开始全套资料
High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
SpinalHDL - Cryptography libraries
Translated SpinalHDL-Doc(v1.7.2) into Chinese
SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype
A re-creation of a Cosmac ELF computer, Coded in SpinalHDL
List of SpinalHDL projects, libraries, and learning resources.
CNN accelerator implemented with Spinal HDL
Matrix Multiplication in Hardware
A curated list of research and repositories on the novel technique of hardware fuzzing
FPGA friendly Multiport memories (N-read-M-write) based on LVT
Mill template for beginning your SpinalHDL project
A collection of side-channel hardening extensions for the hardware description language SpinalHDL
A basic SpinalHDL project, configured with Gradle instead of SBT
An attempt to generate Verilog with parameters using SpinalHDL.
Programming a Colorlight 5A-75E board (ECP5 FPGA) with FT232RL (via JTAG) using VHDL/Verilog/SpinalHDL and open source tools.