risc-v

There are 123 repositories under risc-v topic.

RT-Thread / rt-thread
RT-Thread is an open source IoT real-time operating system (RTOS).
aiot arm cortex-a cortex-m embedded-systems iot kernel microcontroller microkernel mips real-time risc-v rtos
Language:C 9775
platformio / platformio-core
Your Gateway to Embedded Software Development Excellence :alien:
iot embedded arduino esp8266 esp32 avr arm platformio ide unit-testing microcontroller risc-v zephyr-rtos cmsis build-system firmware libraries package-manager debugging rtos
Language:Python 7563
tock / tock
A secure embedded operating system for microcontrollers
arm cortex-m embedded iot kernel mcu microcontroller operating-system risc-v rust secure-operating-system tock
Language:Rust 5007
DietPi
MichaIng / DietPi
Lightweight justice for your single-board computer!
dietpi sbc raspberrypi odroid debian lightweight optimization nanopi pine64 bash shell risc-v
Language:Shell 4578
alibaba / AliOS-Things
面向IoT领域的、高可伸缩的物联网操作系统，可去官网了解更多信息https://www.aliyun.com/product/aliosthings
iot embedded haas microcontroller os risc-v rtos haas-python
Language:C 4543
OpenXiangShan / XiangShan
Open-source high-performance RISC-V processor
chisel microarchitecture risc-v
Language:Scala 4348
chyyuu / os_kernel_lab
OS kernel labs based on Rust/C Lang & RISC-V 64/X86-32
kernel lab os risc-v rust
Language:Rust 3906
SI-RISCV / e200_opensource
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
risc-v ultra-low-power cpu core china verilog nuclei
Language:Verilog 2537
Ripes
mortbopet / Ripes
A graphical processor simulator and assembly editor for the RISC-V ISA
computer-architecture cpu-emulator education processor-architecture qt risc risc-v simulator
Language:C++ 2393
openhwgroup / cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
systemverilog-hdl cpu asic fpga rv64gc ariane risc-v
Language:Assembly 2096
uxmal / reko
Reko is a binary decompiler.
decompiler dotnet decompiler-engine decompile reverse-engineering x86 x86-64 m68k arm aarch64 risc-v disassembler disassemble
Language:C# 1969
darklife / darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
riscv processor-design rv32i rv32e verilog risc-v fpga rtl softcore core processor cpu
Language:Verilog 1900
larsbrinkhoff / awesome-cpus
All CPU and MCU documentation in one place
cpu avr openrisc mcu vax xtensa microblaze datasheet sparc powerpc z80 pdp-10 pdp-11 pdp-1 pdp-8 arm m68k risc-v i860 i960
Language:HTML 1865
rcore-os / rCore-Tutorial-v3
Let's write an OS which can run on RISC-V in Rust from scratch!
rust risc-v rcore operating-system k210
Language:Rust 1473
risc0 / risc0
RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
cryptography risc-v rust stark virtual-machine zero-knowledge
Language:C++ 1456
ucb-bar / chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
rocket-chip chip-generator chisel riscv rtl soc peripherals chipyard risc-v boom firesim hwacha accelerators rocket out-of-order superscalar
Language:Scala 1438
neorv32
stnolting / neorv32
:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
risc-v soft-core vhdl fpga soc microcontroller processor cpu riscv system-on-chip openocd embedded rv32 neorv32 verilog gdb asic safety asip rtl
Language:VHDL 1435
renode / renode
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems
arm embedded-systems iot renode risc-v simulation x86
Language:RobotFramework 1432
gem5 / gem5
The official repository for the gem5 computer-system architecture simulator.
architecture arm modeling open-source risc-v simulation simulator x86
Language:C++ 1427
serv
olofk / serv
SERV - The SErial RISC-V CPU
verilog fpga asic risc-v
Language:Verilog 1261
lowRISC / ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
hardware cpucore risc-v rv32
Language:SystemVerilog 1257
rcore-os / rCore-Tutorial-Book-v3
A book about how to write OS kernels in Rust easily.
rust operating-system risc-v rcore k210
Language:Python 1114
riscv-mcu / e203_hbirdv2
The Ultra-Low Power RISC-V Core
risc-v riscv fpga hummingbird nuclei soc e203 china verilog low-power cpu core
Language:Verilog 1108
TheThirdOne / rars
RARS -- RISC-V Assembler and Runtime Simulator
mars risc-v riscv assembler simulator ide education
Language:Java 1108
ultraembedded / riscv
RISC-V CPU Core (RV32IM)
risc-v cpu verilog fpga verilator rv32im rv32i riscv-linux pipeline-processor asic verification
Language:Verilog 1090
shecc
sysprog21 / shecc
A self-hosting and educational C optimizing compiler
arm armv7 compiler self-hosting c linux risc-v rv32i rv32im riscv qemu cross-compiler elf compiler-optimization
Language:C 1046
simdutf
simdutf / simdutf
Unicode routines (UTF8, UTF16, UTF32) and Base64: billions of characters per second using SSE2, AVX2, NEON, AVX-512, RISC-V Vector Extension. Part of Node.js and Bun.
utf8 utf16 unicode simd neon avx2 sse2 transcoding avx-512 cpp risc-v
Language:C++ 965
k2-fsa / sherpa-onnx
Speech-to-text, text-to-speech, and speaker recongition using next-gen Kaldi with onnxruntime without Internet connection. Support embedded systems, Android, iOS, Raspberry Pi, RISC-V, x86_64 servers, websocket server/client, C/C++, Python, Kotlin, C#, Go, NodeJS, Java, Swift
aarch64 android arm32 asr cpp csharp dotnet ios linux macos mfc onnx openkylin raspberry-pi risc-v speech-to-text text-to-speech vits windows
Language:C++ 901
LekKit / RVVM
The RISC-V Virtual Machine
risc-v riscv riscv32 riscv-emulator vm virtual-machine emulator emulation emulators c risc instruction-decoding rvvm riscv64 jit translation tracing-jit riscv-linux riscv-simulator linux
Language:C 822
firesim
firesim / firesim
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
boom cloud datacenter firesim fpga hardware on-prem risc-v rocket-chip simulation
Language:Scala 819
riscvarchive / riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
asic fpga open-isa risc-v socs
790
syntacore / scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
riscv risc-v rtl verilog rv32i rv32e rv32imc rv32emc ip core
Language:SystemVerilog 777
ultraembedded / biriscv
32-bit Superscalar RISC-V CPU
risc-v rv32i rv32im superscalar cpu fpga verilog pipelined-processors verilator coremark asic branch-prediction in-order linux riscv-linux xilinx artix-7
Language:Verilog 777
chipsalliance / Cores-VeeR-EH1
VeeR EH1 core
processor risc riscv risc-v fusesoc verilator western-digital open-source-hardware rtl fpga asic-design riscv32 ahb-lite axi4 veer
Language:SystemVerilog 774
eugene-tarassov / vivado-risc-v
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
nexys-video risc-v linux xilinx vivado fpga vc707 genesys2 boom rocketchip kc705 arty-a7 riscv
Language:Tcl 745
PiMaker / rvc
A 32-bit RISC-V emulator in a shader (and C)
hlsl risc-v shader unity vrchat
Language:Makefile 713

risc-v

RT-Thread / rt-thread

platformio / platformio-core

tock / tock

MichaIng / DietPi

alibaba / AliOS-Things

OpenXiangShan / XiangShan

chyyuu / os_kernel_lab

SI-RISCV / e200_opensource

mortbopet / Ripes

openhwgroup / cva6

uxmal / reko

darklife / darkriscv

larsbrinkhoff / awesome-cpus

rcore-os / rCore-Tutorial-v3

risc0 / risc0

ucb-bar / chipyard

stnolting / neorv32

renode / renode

gem5 / gem5

olofk / serv

lowRISC / ibex

rcore-os / rCore-Tutorial-Book-v3

riscv-mcu / e203_hbirdv2

TheThirdOne / rars

ultraembedded / riscv

sysprog21 / shecc

simdutf / simdutf

k2-fsa / sherpa-onnx

LekKit / RVVM

firesim / firesim

riscvarchive / riscv-cores-list

syntacore / scr1

ultraembedded / biriscv

chipsalliance / Cores-VeeR-EH1

eugene-tarassov / vivado-risc-v

PiMaker / rvc