risc-v

There are 79 repositories under risc-v topic.

RT-Thread / rt-thread
RT-Thread is an open source IoT operating system.
china embedded-systems kernel iot rtos arm cortex-m cortex-a risc-v mips
Language:C 7301
platformio / platformio-core
A professional collaborative platform for embedded development :alien:
iot embedded arduino mbed esp8266 esp32 fpga avr arm platformio ide unit-testing verilog microcontroller debug risc-v freertos zephyr-rtos cmsis stm32cube
Language:Python 6031
alibaba / AliOS-Things
面向IoT领域的、高可伸缩的物联网操作系统，可去官网了解更多信息https://www.aliyun.com/product/aliosthings
iot embedded haas microcontroller os risc-v rtos haas-python
Language:C 4256
tock / tock
A secure embedded operating system for microcontrollers
embedded operating-system rust cortex-m kernel tock arm secure-operating-system microcontroller mcu iot risc-v
Language:Rust 3646
chyyuu / os_kernel_lab
OS kernel labs based on Rust/C Lang & RISC-V 64/X86-32
kernel lab os risc-v rust
Language:Rust 3551
OpenXiangShan / XiangShan
Open-source high-performance RISC-V processor
chisel3 microarchitecture risc-v
Language:Scala 2908
SI-RISCV / e200_opensource
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
china core cpu nuclei risc-v ultra-low-power verilog
Language:Verilog 2084
larsbrinkhoff / awesome-cpus
All CPU and MCU documentation in one place
cpu avr openrisc mcu vax xtensa microblaze datasheet sparc powerpc z80 pdp-10 pdp-11 pdp-1 pdp-8 arm m68k risc-v i860 i960
Language:HTML 1712
darklife / darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
riscv processor-design rv32i rv32e verilog risc-v fpga rtl softcore core processor cpu
Language:C 1424
uxmal / reko
Reko is a binary decompiler.
decompiler dotnet decompiler-engine decompile reverse-engineering x86 x86-64 m68k arm aarch64 risc-v disassembler disassemble
Language:C# 1394
Ripes
mortbopet / Ripes
A graphical processor simulator and assembly editor for the RISC-V ISA
risc risc-v education simulator qt processor-architecture cpu-emulator computer-architecture
Language:C++ 994
neorv32
stnolting / neorv32
:desktop_computer: A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
risc-v soft-core vhdl fpga soc microcontroller processor cpu riscv system-on-chip openocd gdb safety core embedded rv32 rtos
Language:VHDL 881
ucb-bar / chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
rocket-chip chip-generator chisel riscv rtl soc peripherals chipyard risc-v boom firesim hwacha accelerators rocket out-of-order superscalar
Language:C 839
renode / renode
Renode - Antmicro's virtual development framework for complex embedded systems
arm embedded-systems iot risc-v simulation x86
Language:C# 838
serv
olofk / serv
SERV - The SErial RISC-V CPU
verilog fpga asic risc-v
Language:Verilog 788
lowRISC / ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
hardware cpucore risc-v rv32
Language:SystemVerilog 784
TheThirdOne / rars
RARS -- RISC-V Assembler and Runtime Simulator
mars risc-v riscv assembler simulator ide education
Language:Java 683
rcore-os / rCore-Tutorial-Book-v3
v3.6 https://rcore-os.github.io/rCore-Tutorial-Book-v3/
rust operating-system risc-v rcore k210
Language:Python 658
rcore-os / rCore-Tutorial-v3
Let's write an OS which can run on RISC-V in Rust from scratch!
rust risc-v rcore operating-system k210
Language:Rust 658
riscvarchive / riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
risc-v open-isa socs asic fpga
619
chipsalliance / Cores-SweRV
SweRV EH1 core
processor risc swerv-eh1 riscv risc-v fusesoc verilator western-digital open-source-hardware rtl fpga asic-design riscv32 ahb-lite axi4 swerv
Language:SystemVerilog 593
ultraembedded / riscv
RISC-V CPU Core (RV32IM)
asic cpu fpga pipeline-processor risc-v riscv-linux rv32i rv32im verification verilator verilog
Language:Verilog 575
firesim
firesim / firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
fpga risc-v simulation datacenter hardware firesim rocket-chip boom cloud
Language:Scala 570
syntacore / scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
riscv risc-v rtl verilog rv32i rv32e rv32imc rv32emc ip core
Language:SystemVerilog 540
eclipse-embed-cdt / eclipse-plugins
The Eclipse Embedded CDT plug-ins for Arm & RISC-V C/C++ developers (formerly known as the GNU MCU Eclipse plug-ins). Includes the archive of previous plug-ins versions, as Releases.
eclipse arm risc-v plugins cdt embedded plug-ins eclipse-marketplace
Language:C 537
PiMaker / rvc
A 32-bit RISC-V emulator in a shader (and C)
hlsl risc-v shader unity vrchat
Language:Makefile 517
riscv-mcu / e203_hbirdv2
The Ultra-Low Power RISC-V Core
risc-v riscv fpga hummingbird nuclei soc e203 china verilog low-power cpu core
Language:Verilog 504
risc0 / risc0
RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
cryptography risc-v rust stark virtual-machine zero-knowledge
Language:Rust 492
fnuecke / oc2
RISC-V VMs in Minecraft.
java minecraft mod risc-v vm
Language:Java 454
takahirox / riscv-rust
RISC-V processor emulator written in Rust+WASM
cpu emulator processor risc-v riscv rust wasm webassembly
Language:Rust 425
ultraembedded / biriscv
32-bit Superscalar RISC-V CPU
artix-7 asic branch-prediction coremark cpu fpga in-order linux pipelined-processors risc-v riscv-linux rv32i rv32im superscalar verilator verilog xilinx
Language:Verilog 423
shecc
jserv / shecc
A self-hosting and educational C compiler
arm armv7 compiler self-hosting c linux risc-v rv32i rv32im riscv qemu cross-compiler elf
Language:C 422
riscvarchive / riscv-software-list
The RISC-V software tools list, as seen on riscv.org
risc-v open-source
385
jupiter
andrescv / jupiter
RISC-V Assembler and Runtime Simulator
assembler education risc risc-v riscv riscv-asm riscv-simulator runtime-simulator rv32 rv32imf simulator
Language:Java 366
larsbrinkhoff / lbForth
Self-hosting metacompiled Forth, bootstrapping from a few lines of C; targets Linux, Windows, ARM, RISC-V, 68000, PDP-11, asm.js.
forth compiler interpreter metacompiler pdp11 m68k self-hosted linux arm programming-language x86 asmjs risc-v riscv 6502 msp430 avr 8051 cortex-m
Language:Forth 360
beehive-lab / Maxine-VM
Maxine VM: A meta-circular research VM
java jvm metacircular-vm graal c1x t1x armv7 x86 aarch64 risc-v riscv maxine-vm research
Language:Java 300

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