There are 140 repositories under risc-v topic.
A FREE comprehensive reverse engineering tutorial covering x86, x64, 32-bit/64-bit ARM, 8-bit AVR and 32-bit RISC-V architectures.
Your Gateway to Embedded Software Development Excellence :alien:
Speech-to-text, text-to-speech, speaker diarization, speech enhancement, and VAD using next-gen Kaldi with onnxruntime without Internet connection. Support embedded systems, Android, iOS, HarmonyOS, Raspberry Pi, RISC-V, x86_64 servers, websocket server/client, support 11 programming languages
面向IoT领域的、高可伸缩的物联网操作系统,可去官网了解更多信息https://www.aliyun.com/product/aliosthings
A fully compliant RISC-V computer made inside the game Terraria
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Raspberry Pi Pico Arduino core, for all RP2040 and RP2350 boards
Modern, advanced, portable, multiprotocol bootloader and boot manager.
All CPU and MCU documentation in one place
RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems
Let's write an OS which can run on RISC-V in Rust from scratch!
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
The Ultra-Low Power RISC-V Core
RISC-V CPU Core (RV32IM)
Unicode routines (UTF8, UTF16, UTF32) and Base64: billions of characters per second using SSE2, AVX2, NEON, AVX-512, RISC-V Vector Extension, LoongArch64. Part of Node.js, WebKit/Safari, Ladybird, Chromium, Cloudflare Workers and Bun.
RARS -- RISC-V Assembler and Runtime Simulator
A book about how to write OS kernels in Rust easily.
32-bit Superscalar RISC-V CPU
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro