amba

There are 2 repositories under amba topic.

taichi-ishitani / tvip-axi
AMBA AXI VIP
systemverilog uvm amba amba-axi axi axi4 vip
Language:SystemVerilog 300
rggen / rggen
Code generation tool for control and status registers
verilog systemverilog uvm rtl ral csr soc fpga asic register-descriptions uvm-ral-model wiki-documents amba axi apb uvm-register-model eda vhdl wishbone-bus
Language:Ruby 280
taichi-ishitani / tnoc
Network on Chip Implementation written in SytemVerilog
noc network-on-chip systemverilog amba amba-axi axi axi4 uvm
Language:SystemVerilog 133
lucky-wfw / ARM_AMBA_Design
Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
verilog amba arm apb ahb axi
Language:Verilog 96
dpretet / axi-crossbar
An AXI4 crossbar implementation in SystemVerilog
axi4 axi4-lite axi4-protocol axi4-full crossbar interconnect fpga fpga-soc processor asic-design asic soc amba arm verilog riscv riscv32 riscv64 monodraw
Language:SystemVerilog 86
arm-university / Introduction-to-SoC-Design-Education-Kit
Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals
system-on-chip soc arm-cortex-m0 fpga system-on-chip-design amba arm cmsis cortex-m hardware-designs keil-mdk design-start
Language:HTML 81
arm-university / Efficient-Embedded-Systems-Design-Education-Kit
Design and program Arm-based embedded systems and implement them in low-level hardware using standard C and assembly language.
embedded embedded-systems arm-cortex-m4 arm-cortex-m33 embedded-system-design arm cortex-m hardware-designs st-nucleo-f401re trustzone st-nucleo-l552ze amba discovery-f4 armv8 keil-mdk
Language:C 80
RoaLogic / ahb3lite_interconnect
AHB3-Lite Interconnect
amba ahb3-lite switch interconnect
Language:SystemVerilog 75
SystemRDL / PeakRDL
Control and status register code generator toolchain
asic fpga eda registers register-descriptions systemrdl-compiler hardware-description-language command-line-tool amba apb axi csr systemverilog uvm uvm-register-model verilog
Language:Python 74
arm-university / Advanced-System-on-Chip-Design-Education-Kit
Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description and software programming languages
cortex-a9 fpga arm armv7 soc-design arm-cortex-a9 amba cortex-a hardware-designs system-on-chip-design zybo-z7-10
Language:HTML 69
prajwalgekkouga / AHB-to-APB-Bridge
The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB.
ahb amba apb digital fpga modelsim verilog verilog-project
Language:Verilog 40
RoaLogic / ahb3lite_apb_bridge
Parameterised Asynchronous AHB3-Lite to APB4 Bridge.
amba apb-bridge ahb3-lite apb
Language:SystemVerilog 38
somyadashora / AMBA-AXI4-Lite
Master and Slave made using AMBA AXI4 Lite protocol.
amba axi4-lite verilog design
Language:Stata 20
taichi-ishitani / tvip-apb
Verification IP for AMBA APB Protocol
uvm systemverilog vip amba apb
Language:SystemVerilog 19
RoaLogic / ahb3lite_memory
Multi-Technology RAM with AHB3Lite interface
ahb3-lite ahb3lite-memory amba
Language:SystemVerilog 18
arm-university / Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers
A textbook on understanding system on chip design
amba arm-cortex-m fpga fpga-soc soc-design system-on-chip-design cmsis cpu-architecture embedded-systems trustzone bus-architecture soc textbook
15
arm-university / System-on-Chip-Design-with-Arm-Cortex-M-Processors
A reference book on System-on-Chip Design
amba cortex-m embedded-systems soc-design software-design system-on-chip-design arm-cortex-m keil-mdk bus-architecture cortex-m-processors reference-book
13
merledu / caravan
A caravan equipped with API for creating bus protocols in Chisel with ease.
bus-protocols caravan wishbone on-chip-network amba chisel3 chisel-generator
Language:Scala 12
PXVI / ip_amba_apb_ms_rtl_v
The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )
verilog rtl amba apb3 memory master slave ip lint
Language:Verilog 12
TILhub / AMBA-3-AHB-Lite-Protocol
This Repo contains SystemC for testBench for AMBA® 3 AHB-Lite Protocol
arm emulation systemc stl cplusplus amba lite ahb-lite protocol testbench testbenches
Language:C++ 12
RoaLogic / apb4_gpio
General Purpose IO with APB4 interface
amba apb gpio
Language:SystemVerilog 11
dpretet / meduram
Multi-port BRAM IP for ASIC and FPGA
bram ram amba axi4 fpga svut yosys iverilog block fusesoc asic axi4-lite axi4-lite-interface multi-port
Language:SystemVerilog 10
plasoc / axiplasma
AXI/MIPS SoC developed in VHDL with FreeRTOS port. Capable of running either preemptively or cooperatively.
mips system-on-chip real-time operating-system vhdl freertos axi amba vivado xilinx c
Language:VHDL 7
abdelazeem201 / Arm-Core
This is a list of central processing units based on the ARM family of instruction sets designed by ARM Ltd. and third parties, sorted by version of the ARM instruction set, release and name. In 2005, ARM provided a summary of the numerous vendors who implement ARM cores in their design.
amba armv4 armv6 armv7 armv9 axi c fpga soc verilog vhdl vhdl-code systemverilog
Language:C 5
ambel
substate-tech / ambel
AMBEL is a Chisel library for generating AMBA components
chisel3 amba apb fpga verilog
Language:Scala 4
anmol109 / AMBA-AXI4-Lite
An implementation of AMBA AXI4Lite on an FPGA using verilog
amba axi fpga rtl verilog
Language:Verilog 2
Ghonimo / Formal-Verification-of-an-AHB2APB-Bridge
Assertion-Based Formal Verification of an AHB2APB bridge, featuring SystemVerilog assertions, RTL designs, and detailed documentation including a final report and project progression presentation.
abp ahb ahb2 amba assertion-based-verification computer-ar formal-verification harward uvm verification
Language:SystemVerilog 1
iDoka / statistics-acquisition-module
Statistics Acquisition Module on Verilog
fpga vlsi asic verilog generator debug statistics gdb rtl hdl xilinx axi amba
1
namu00 / AMBA_AHB_lite
AMBA AHB-lite studyroom
ahb3-lite amba arm bus verilog
Language:Verilog 1
rodrigomelo9 / amba
A presentation about Advanced Microcontroller Bus Architecture
ahb amba apb axi
Language:Makefile

amba

taichi-ishitani / tvip-axi

rggen / rggen

taichi-ishitani / tnoc

lucky-wfw / ARM_AMBA_Design

dpretet / axi-crossbar

arm-university / Introduction-to-SoC-Design-Education-Kit

arm-university / Efficient-Embedded-Systems-Design-Education-Kit

RoaLogic / ahb3lite_interconnect

SystemRDL / PeakRDL

arm-university / Advanced-System-on-Chip-Design-Education-Kit

prajwalgekkouga / AHB-to-APB-Bridge

RoaLogic / ahb3lite_apb_bridge

somyadashora / AMBA-AXI4-Lite

taichi-ishitani / tvip-apb

RoaLogic / ahb3lite_memory

arm-university / Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers

arm-university / System-on-Chip-Design-with-Arm-Cortex-M-Processors

merledu / caravan

PXVI / ip_amba_apb_ms_rtl_v

TILhub / AMBA-3-AHB-Lite-Protocol

RoaLogic / apb4_gpio

dpretet / meduram

plasoc / axiplasma

abdelazeem201 / Arm-Core

substate-tech / ambel

anmol109 / AMBA-AXI4-Lite

Ghonimo / Formal-Verification-of-an-AHB2APB-Bridge

iDoka / statistics-acquisition-module

namu00 / AMBA_AHB_lite

rodrigomelo9 / amba