ahb-lite

There are 0 repository under ahb-lite topic.

chipsalliance / Cores-VeeR-EH1
VeeR EH1 core
processor risc riscv risc-v fusesoc verilator western-digital open-source-hardware rtl fpga asic-design riscv32 ahb-lite axi4 veer
Language:SystemVerilog 775
chipsalliance / Cores-VeeR-EL2
VeeR EL2 Core
el2 verilator western-digital riscv risc-v processor open-source-hardware fusesoc rtl fpga axi4 ahb-lite riscv32 asic-design
Language:SystemVerilog 222
Lampro-Mellon / Quasar
Quasar 2.0: Chisel equivalent of SweRV-EL2
riscv chisel chisel3 scala rtl swerv swerv-el2 processor open-source-hardware asic-design asic-verification axi4 ahb-lite verilator
Language:Scala 27
TILhub / AMBA-3-AHB-Lite-Protocol
This Repo contains SystemC for testBench for AMBA® 3 AHB-Lite Protocol
arm emulation systemc stl cplusplus amba lite ahb-lite protocol testbench testbenches
Language:C++ 12
AHB-Lite-Protocol-Verification
WajahatRiaz / AHB-Lite-Protocol-Verification
Attempt to develop a verification IP and plan for a bus functional model of ARM based AMBA 3 AHB-LITE Protocol. Implemented object oriented programming techniques in SysteVerilog.
arm systemverilog systemverilog-developer systemverilog-test-bench ahb-lite
Language:SystemVerilog 12
shalan / MS_QSPI_XIP_CACHE
AHB-Lite Quad I/O SPI Flash memory controller with direct mapped cache and support for XiP
ahb-lite asic ip qspi qspi-flash sky130 verilog
Language:Verilog 5
shalan / MS_DMAC_AHBL
A Direct Memory Access Controller (DMAC) with AHB-lite bus interface
ahb-lite asic dma dmac fpga verilog
Language:Verilog 2
vicharak-in / vaaman-ahb-verilog
Verilog AHB Bus implementation for VAAMAN
ahb ahb-lite ahb3-lite verilog verilog-hdl
Language:Verilog