vhdl-code

There are 18 repositories under vhdl-code topic.

alialaei1 / HDLab-FPGA-Development-Board
Open source FPGA development platform
fpga board pcb development hdl fpga-board fpga-game vhdl-examples training vhdl vhdl-code pcb-design pcb-layout electronic electronics electronics-engineering electronics-projects hdlab
Language:VHDL 40
alirezakay / RISC-CPU
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
cpu cpu-model cpu-architecture processor-design processor-architecture mips-processor isa instruction-set-architecture multi-cycle risc-processor vhdl vhdl-code vhdl-modules
Language:VHDL 26
mcagriaksoy / VHDL-FPGA-LAB_PROJECTS
My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)
xilinx-fpga xilinx-ise fpga vhdl vhdl-code vhdl-examples fpga-soc verilog
Language:VHDL 23
sarthak268 / Embedded_Logic_and_Design
This repository contains all labs done as a part of the Embedded Logic and Design course.
verilog verilog-hdl verilog-programs verilog-project embedded-systems embedded-logic logic-circuit logic-programming embedded-c c vhdl vhdl-code zedboard xilinx xilinx-vivado xilinx-fpga xilinx-sdk arm vivado pmod
22
datacipy / VHDL
Příklady ke knize Data, čipy, procesory
vhdl vhdl-code vhdl-examples vhdl-elearning fpga fpga-programming
Language:VHDL 19
arasgungore / VGA-based-screensaver
A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.
vga-driver vhdl screensaver digital-design screen-saver 256-colors 256-color rgb-color rgb color colors vga vga-controller fpga fpga-programming fpga-board vhdl-code frequency-divider clock-divider synchronization
Language:VHDL 18
FPGA_HW_SIM_FWK_2
ClarkFieseln / FPGA_HW_SIM_FWK_2
FPGA Hardware Simulation Framework
api emulation emulator fpga fpga-programming hdl pygubu python python-3 python3 simulation simulator vhdl vhdl-code pygubu-designer windows windows-10 windows-11 windows10
Language:Python 17
ClarkFieseln / FPGA_HW_SIM_FWK
FPGA Hardware Simulation Framework
api emulation emulator fpga fpga-programming simulation simulator vhdl vhdl-code pyqt pyqt5 hdl python python-3 python3
Language:Python 16
arasgungore / 256-colors-with-VGA
A VHDL-based VGA driver to display 256 different colors on a monitor.
vga-driver vhdl 256-colors color-scheme rgb rgb-color digital-design color colors vga vga-controller vhdl-code fpga fpga-programming fpga-board frequency-divider clock-divider synchronization 256-color colorscheme
Language:VHDL 14
santifs / ultrasonic-sensor
Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.
vhdl nexys4ddr fpga-programming xilinx-fpga vhdl-modules vhdl-code ultrasonic-sensor parking-sensor 7segment
Language:VHDL 12
akaeba / tinyUART
Lightweight UART core in VHDL
asic controller fpga hardware hdl rs232 uart uart-transmitter uart-vhdl vhdl vhdl-code
Language:VHDL 11
JulyWitch / vhdl_ghdl_examples
Simple VHDL examples using ghdl as compiler and wave generating
ghdl vhdl gtkwa scansion vhdl-examples vhdl-code vhdl-testbench
Language:VHDL 11
akaeba / generic_spi_master
Customizable multi chip select supporting Serial Peripheral Interface master.
fpga generic hdl parallel sck spi spi-controller spi-master spi-modes vhdl vhdl-code
Language:VHDL 10
Charlie5DH / RISC-V-Single-Cycle-uP
Design and implementation in VHDL for FPGAs of a single cycle RISC-V based architecture
vhdl risc-v microprocessors vhdl-code fpga quartus
Language:VHDL 10
nazaninsbr / Neural-Network
Neural Network with VHDL and matlab
neural-network neurons vhdl vhdl-code neural-network-vhdl neural-networks-from-scratch
Language:C 9
BertVerrycken / BERT
Bit-Efficient Replicator Tech for X, Y, Z axis motor control (3D printers)
fpga vhdl-code systemverilog-hdl 3dprinter
Language:VHDL 8
Kazhuu / audio-synthesizer
Copy of old FPGA audio synthesizer project for DE2 development board
audio synthesizer fpga vhdl vhdl-code
Language:VHDL 8
mrtkp9993 / VHDLExamples
VHDL examples.
vhdl fpga embedded-systems embedded-software vhdl-code
Language:VHDL 8
s-gbz / VHDL-exercises-examples
Code examples from the Technical Computer Science (Technische Informatik) module.
vhdl vhdl-code vhdl-examples
Language:VHDL 8
jagumiel / irReceiver
Remote control infrared signal receiver programmed in VHDL for a Terasic DE1-SoC board.
infrared-decoder ir-decoder ir-receiver quartus-prime vhdl vhdl-code
Language:VHDL 7
obih9 / Progetto-Reti-Logiche-2021
Prova Finale di Reti Logiche - Polimi Ingegneria Informatica - a.a. 2020-2021
vhdl polimi histogram-equalization vhdl-code
Language:VHDL 7
tocache / Altera-Cyclone-II-FPGA
Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II
fpga altera quartus quartus2 vhdl vhdl-code vhdl-examples vhdl-modules
Language:C 7
abdelazeem201 / Arm-Core
This is a list of central processing units based on the ARM family of instruction sets designed by ARM Ltd. and third parties, sorted by version of the ARM instruction set, release and name. In 2005, ARM provided a summary of the numerous vendors who implement ARM cores in their design.
amba armv4 armv6 armv7 armv9 axi c fpga soc systemverilog verilog vhdl vhdl-code
Language:C 6
akaeba / eSpiMasterBfm
Bus functional model of an Enhanced Serial Peripheral Interface (eSPI) master
espi enhanced-spi bfm bus-functional-model master testbench intel vhdl vhdl-code vhdl93
Language:VHDL 6
akgokce / dungeon-escape-vhdl-game
Dungeon Escape VHDL Game
game vhdl vhdl-code vhdl-game xilinx
Language:VHDL 6
arxiver / Pipelined-MIPS
MIPS Pipelined CPU simulation using VHDL language
processor-architecture processor processor-simulator vhdl-code vhdl hardware-designs
Language:VHDL 6
aybaras / VGA-based-screensaver
A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.
vga-driver vhdl screensaver digital-design screen-saver 256-colors 256-color rgb rgb-color color colors vga vga-controller fpga fpga-programming fpga-board vhdl-code frequency-divider clock-divider synchronization
Language:VHDL 6
elbekka / Programacion-De-Hardware-VHDL
4 bits ALU with 2 entries of selection using structural vhdl
vhdl-code alu structural
Language:VHDL 6
manish-9245 / VHDL-Programs
This repository contains VHDL files of different Digital Designs.
vhdl vhdl-code vhdl-examples vhdl-modules vhdl-coursework
Language:VHDL 6
romybompart / Basys3-clock-alarm-with-buzzer
Digital clock implemented in vhdl for the Basys 3 Board from Digilent.
vhd vhdl-code digilent basys3 basys3-fpga digital-clock clock digit basys3-clock-alarm buzzer buzzer-termination
Language:VHDL 6
SAHassani / KU_Leuven_DiSIC
Digital Self-interference Canceller
fpga vhdl-code vhdl signal-processing
Language:VHDL 6
alice-fit-fpga
AliceO2Group / alice-fit-fpga
ALICE Fast Interaction Trigger (FIT) FPGA code
fpga-firmware vhdl-code vivado gbt cern alice-experiment
Language:VHDL 5
UART_Receiver_Transmitter_Controller_VHDL-FPGA
MohammadNiknam17 / UART_Receiver_Transmitter_Controller_VHDL-FPGA
VHDL codes for UART Interface; hardware communication protocol. contains Receiver & Transmitter units & RAM memory.
uart-protocol uart-interface uart fpga vhdl vhdl-code reciver transmitter ram memory digital-logic-design
Language:VHDL 5
mongrelgem / cMIPS
A complete classic 5-stage pipeline MIPS 32-bit processor, including a 2-bit branch predictor, a branch prediction buffer and a direct-mapped cache.
mips-processor mips-architecture processor vhdl-code verilog-hdl hardware-designs
Language:Verilog 5
chclau / axi_lite_reg-
Registers bank with Axi-Lite interface
axi-lite vhdl vhdl-code vhdl-examples
Language:VHDL 4
Var7600 / VHDL-GENERATOR
App that Generate VHDL Code and Testbench template file
vhdl vhdl-code vhdl-modules vhdl-testbench
Language:Java 4

vhdl-code

alialaei1 / HDLab-FPGA-Development-Board

alirezakay / RISC-CPU

mcagriaksoy / VHDL-FPGA-LAB_PROJECTS

sarthak268 / Embedded_Logic_and_Design

datacipy / VHDL

arasgungore / VGA-based-screensaver

ClarkFieseln / FPGA_HW_SIM_FWK_2

ClarkFieseln / FPGA_HW_SIM_FWK

arasgungore / 256-colors-with-VGA

santifs / ultrasonic-sensor

akaeba / tinyUART

JulyWitch / vhdl_ghdl_examples

akaeba / generic_spi_master

Charlie5DH / RISC-V-Single-Cycle-uP

nazaninsbr / Neural-Network

BertVerrycken / BERT

Kazhuu / audio-synthesizer

mrtkp9993 / VHDLExamples

s-gbz / VHDL-exercises-examples

jagumiel / irReceiver

obih9 / Progetto-Reti-Logiche-2021

tocache / Altera-Cyclone-II-FPGA

abdelazeem201 / Arm-Core

akaeba / eSpiMasterBfm

akgokce / dungeon-escape-vhdl-game

arxiver / Pipelined-MIPS

aybaras / VGA-based-screensaver

elbekka / Programacion-De-Hardware-VHDL

manish-9245 / VHDL-Programs

romybompart / Basys3-clock-alarm-with-buzzer

SAHassani / KU_Leuven_DiSIC

AliceO2Group / alice-fit-fpga

MohammadNiknam17 / UART_Receiver_Transmitter_Controller_VHDL-FPGA

mongrelgem / cMIPS

chclau / axi_lite_reg-

Var7600 / VHDL-GENERATOR