There are 2 repositories under isa topic.
RISC-V simulator for x86-64
For finding, sharing and exchanging Data, Models, Simulations and Processes in Science.
x86-64 | ARM (AArch32/AArch64/THUMB) full instruction set.
ISA 8bit sound card based on the ES1868F sound chip, providing Sound Blaster PRO and OPL3 compatibility in a highly integrated package
Multi-Architecture UEFI Environment Driver
A technical checklist to spark curiosity and reflection when designing software systems.
A repository of results for runs of sandsifter on various x86 CPU's
Sound Card for the ISA (8bit) bus sporting Sound Blaster / Sound Blaster PRO emulation via ES688F chip, and a real Yamaha OPL3 FM Synth. It's also completely jumper configurable.
Excel Add-In for annotation of experimental data and computational workflows.
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
8bit ISA NE2000-compatible network card based on the RTL8019AS chip
Risa allows to access metadata/data in ISA-tab format and builds Bioconductor data structures. Apart from parsing ISA-tab files, the package also provides functionality to save the ISA-tab dataset, or each of its individual files. Additionally, it is also possible to update assay files. Currently, metadata associated to proteomics and metabolomics-based assays (i.e. mass spectrometry) can be processed into an xcmsSet object (from the xcms R package).
A 5-stage pipelining RISC-V 32I simulator written in Rust.
This board is and EGA clone based on a reversed PA-WTEGA card, based on the chipset by CHIPS (P82C435 + P82A436).
ISA 8bit EMS 2Mb expansion card
8 bit ISA Parallel port + dual UART adapter
RISC-V ISA based 32-bit processor written in HLS
A 64-bit Virtual Machine that emulates a non-existent architecture. Merry is an in-development VM with its custom ISA. It has been developed to aid in problem solving.
IBM Colour Graphics Adapter schematics redrawn in KiCad
Custom 64-bit pipelined RISC processor
64-bit RISC CPU Architecture