processor-architecture

There are 7 repositories under processor-architecture topic.

intel / pcm
Intel® Performance Counter Monitor (Intel® PCM)
monitor-performance processor performance-monitoring energy performance-analysis performance-metrics performance-dashboard performance-visualization processor-architecture cpu xeon intel pcm power linux windows osx freebsd monitoring performance-counters
Language:C++ 2545
Ripes
mortbopet / Ripes
A graphical processor simulator and assembly editor for the RISC-V ISA
risc risc-v education simulator qt processor-architecture cpu-emulator computer-architecture
Language:C++ 2369
jbush001 / NyuziProcessor
GPGPU microprocessor architecture
fpga gpu gpu-computing graphics hardware microprocessor processor-architecture verilog
Language:C 1902
hlorenzi / customasm
💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/
assembly assembly-language assembler instruction-set instruction-set-architecture processor-architecture microprocessor bytecode bytecode-compiler compiler customizable custom virtual-machine vm machine-code webassembly user-defined asm rust rust-lang
Language:Rust 679
RISC-V-Guide
mikeroyal / RISC-V-Guide
RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.
risc-v riscv64 riscv-emulator sbc peripherals sel4 computer-architecture processor-architecture risc-processor platformio tensoflow-lite hypervisor rv32 optimize cpu-profiling simulator processor riscv virtualization android-app
Language:Assembly 449
Mariotti94 / WebRISC-V
WebRISC-V: A Web-Based Education-Oriented RISC-V Pipeline Simulation Environment [PHP]
assembly computer-architecture education php pipeline pipeline-simulation-environment processor-architecture risc risc-v simulator
Language:PHP 108
sstsimulator / sst-elements
SST Architectural Simulation Components and Libraries
simulator memory processor-architecture networking processor network-analysis cache cache-simulator trace system-design hpc simulation snl-other snl-performance-workflow
Language:C++ 82
caleb531 / cache-simulator
A processor cache simulator for the MIPS architecture
cache mips processor processor-architecture python simulator
Language:Python 34
alirezakay / RISC-CPU
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
cpu cpu-model cpu-architecture processor-design processor-architecture mips-processor isa instruction-set-architecture multi-cycle risc-processor vhdl vhdl-code vhdl-modules
Language:VHDL 26
physical-computation / sunflower-embedded-system-emulator
Sunflower Full-System Hardware Emulator and Physical System Simulator for Sensor-Driven Systems. Built-in architecture modeling of Hitachi SH (j-core), RISC-V, and more.
processor-simulator processor-architecture cross-compiler simulator embedded-systems emulators battery-simulator network-simulator power-simulator hitachi superh j-core riscv-simulator riscv-emulator riscv-sim riscv32 riscv
Language:C 22
sdasgup3 / parallel-processor-design
Super scalar Processor design
verilog-hdl processor verilog processor-architecture processor-simulator instruction-set-architecture superscalar pipeline-processor pipeline-cpu assembler flex bison parallel-computing instruction-level-parallelism mnemonics forwarding bypassing branch-prediction instruction-set opcode
Language:Verilog 20
Amey-Thakur / COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB
CSC403: Computer Organization and Architecture [COA] & CSL403: Processor Architecture Lab [PAL] <Semester IV>
engineering computer-engineering computer-science textbooks computer-organisation-architechure computer-organization computer-organisation computer-organization-lab computer-organization-and-design processor-architecture processor-design computer-organ ameythakur amey megasatish
Language:C 14
GodTamIt / tomasulo-simulation
A simulation of the Tomasulo algorithm, a hardware algorithm for out-of-order scheduling and execution of computer instructions, written in C++.
tomasulo hardware simulation processor processor-architecture processor-simulator
Language:C++ 13
Mograsim
Mograsim-Team / Mograsim
Modular Graphical Simulator for Teaching Microprogramming
tum era am2900 amd microprogramming teaching assembler simulator modular graphical eclipse plugin processor processor-architecture processor-simulator instruction-set-architecture emulator mograsim java emulation
Language:Java 13
alexander-titov / public
A collection of my cources, lectures, articles and presentations
computer-architecture computer-engineering computer-science cpu digital-design lectures presentations processor-architecture
Language:C++ 12
prantoamt / 16bit_processor_design
hardware-designs processor processor-architecture logisim computer-architecture simulation computer-design-and-implementation cpu cse332 cse mips mips-assembly mips-architecture mips-simulator mips-processor mips-assembler mips-language
11
digital-design-snu / RNBIP_SingleBusProcessor
Single Bus Processor - Summer Project 2016
processor processor-architecture processor-simulator fpga
Language:Verilog 8
aitesam961 / 16-Bit-RISC-Core-Processor
A RISC custom-ISA, 16-Bit Processor
cpu processor-architecture risc-v verilog assembly computer-architecture digital-design mips python
Language:C 7
thenamangoyal / RISC-Simulator
A C++ pipeline based simulator of RSIC architecture.
risc-processor mem assembly risc-simulator pipeline-simulator risc-language architecture computer-architecture simplerisc-assembly-language simplerisc c-plus-plus c-plus-plus-11 functional-simulator pipeline-cpu pipelining pipeline functional simulator processor-architecture processor-simulator
Language:C++ 7
worthant / OPD
:computer: This course is about computer science basics.
computer-architecture-fundamentals microprocessors processor-architecture unix-like-os unix-os computer-science-basics
Language:Assembly 7
arxiver / Pipelined-MIPS
MIPS Pipelined CPU simulation using VHDL language
processor-architecture processor processor-simulator vhdl-code vhdl hardware-designs
Language:VHDL 6
GeekAlexis / superscalar-mips
A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines
processor-architecture verilog mips
Language:Verilog 6
luk3Sky / Building-A-Processor---Project
Design of a simulated 8-bit single-cycle processor using Verilog HDL, which includes an ALU, a register file and other control logic
verilog-hdl verilog-project processor-architecture hdl alu
Language:Verilog 6
ShichenQiao / ECE554_SP23_FPGA_Handwriting_Recognition
Senior Design Project at UW-Madison ECE
cnn fpga handwriting-recognition processor-architecture
Language:Verilog 6
Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project
Domain Specific Hardware Accelerators - VLSI CAD Project
bluespec bluespec-systemverilog bluespec-systemverilog-language processor-design processor-architecture vector-processor ram bus hardware hardware-designs hardware-acceleration processor vlsi-cad vlsi vlsi-physical-design vlsi-design
Language:Bluespec 6
trexxet / virtaxy-vm
Flexible functional simulator and assembler for user-defined architectures
assembler c code-generation cpu-emulator processor-architecture
Language:C 6
lazyoracle / vhdl-processor
An 8-bit processor in VHDL based on a simple instruction set
fpga processor-simulator vhdl digital-electronics hdl hardware-description-language hardware-designs xilinx-fpga altera-fpga verilog vivado processor processor-architecture processor-design
Language:VHDL 5
levindoneto / MIPS
Microprocessor without Interlocked Pipeline Stages with the extra JR, DIV and MFLO instructions implemented.
mips processor-architecture instruction-set-architecture monocycle-processor multicycle-processor pipeline-processor
5
linguini1 / gol-16
A custom 16-bit processor with a custom assembly language and emulator, based off of the ARM 32-bit processor.
arm-assembly arm-processor assembler assembly emulator hardware hardware-design processor processor-architecture processor-arm schematic
Language:C 5
arda-guler / TurnaCore
An imaginary 16-bit CPU architecture with custom assembly language and instructions
assembly cpu cpu-emulator educational experimental low-level processor processor-architecture processor-simulator memory ram emulator asm challenge
Language:Python 4
bit0fun / Fusion-Core
Open source ISA | Useful in co-processors/CISC add-ons, and limitless code compatibility
processor-architecture multiprocessor verilog verilog-hdl fpga-firmware
Language:Coq 4
kara-abdelaziz / SEP-CPU
SEP, for Simple Enough Processor, is an elaborated from scratch simulated (on Logisim) educational CPU
computer-architecture computer-organization cpu digital-design processor processor-architecture processor-design processor-simulation
Language:Assembly 4
kejriwalrahul / 3-Stage-Pipeline
A Three Stage Pipeline 16-bit processor implemented in Verilog
processor-architecture pipeline-processor
Language:Verilog 4
nimaiji / MIPS-Pipeline-CPU
💻 MIPS Pipeline Processor simulator
cpu mips mips-assembly mips-simulator mips32 mips-processor mips-language processor-simulator processor-architecture
Language:Python 4
shyamal-anadkat / WISC-SP13
CS 552 term project : functional design of a microprocessor called the WISC-SP13
verilog verilog-hdl processor-architecture mips-assembly hardware-designs processor cs552
Language:Assembly 4
ctsiaousis / mipsMultiCycleProcessor
A VHDL implementation of a MIPS processor with multicycle instruction fetching
fpga mips mips-assembly processor-architecture vhdl xilinx xilinx-fpga xilinx-ise
Language:C 3

processor-architecture

intel / pcm

mortbopet / Ripes

jbush001 / NyuziProcessor

hlorenzi / customasm

mikeroyal / RISC-V-Guide

Mariotti94 / WebRISC-V

sstsimulator / sst-elements

caleb531 / cache-simulator

alirezakay / RISC-CPU

physical-computation / sunflower-embedded-system-emulator

sdasgup3 / parallel-processor-design

Amey-Thakur / COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB

GodTamIt / tomasulo-simulation

Mograsim-Team / Mograsim

alexander-titov / public

prantoamt / 16bit_processor_design

digital-design-snu / RNBIP_SingleBusProcessor

aitesam961 / 16-Bit-RISC-Core-Processor

thenamangoyal / RISC-Simulator

worthant / OPD

arxiver / Pipelined-MIPS

GeekAlexis / superscalar-mips

luk3Sky / Building-A-Processor---Project

ShichenQiao / ECE554_SP23_FPGA_Handwriting_Recognition

Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project

trexxet / virtaxy-vm

lazyoracle / vhdl-processor

levindoneto / MIPS

linguini1 / gol-16

arda-guler / TurnaCore

bit0fun / Fusion-Core

kara-abdelaziz / SEP-CPU

kejriwalrahul / 3-Stage-Pipeline

nimaiji / MIPS-Pipeline-CPU

shyamal-anadkat / WISC-SP13

ctsiaousis / mipsMultiCycleProcessor