the-pinbo

crop-prediction

Developed a machine learning-based crop prediction model to assist farmers in making informed decisions about crop selection, planting, and harvesting.Integrated weather and geolocation APIs along with a web page for simplified user experience.

PDM-to-Ethernet-Packet-Generator

This project explores real-time audio signal processing on a Digilent Nexys4-DDR FPGA board, capturing audio from a MEMS microphone, processing it with FFT, and transmitting results via Ethernet for potential applications in audio analysis and processing.

Plagiarism-Check

Create a TURNITIN equivalent free software to do plagiarism checking of research articles / thesis etc.

ROBDD

A binary decision diagram is a directed acyclic graph used to represent a Boolean function. The ROBDD is a canonical form, which means that given an identical ordering of input variables, equivalent Boolean functions will always reduce to the same ROBDD.

mim

MIM is a command line GUI torrent application that can download files from the internet through .torrent files and magnet links. It involves deep knowledge of networking and an understanding of peer-2-peer communication using the BitTorrent protocol.

Anchor-Docker_Clone

A repository containing our learnings and implementations for the project "Anchor: The Docker Clone" under IEEE-NITK

blog

BooleanCalculator

boolean calculator engine using urp

Envision-TicTacToe-Bot

Envision 22 AI tic-tac-toe bot

image-denoising

The standard approach to image reconstruction using deep learning is to use clean image priors for training purposes. In this project, we attempt to achieve denoising without using a clean image prior and yet, achieving a performance comparable to, or sometimes, even better than that obtained using the conventional approach.

Image_Captioning

ripened-fruits-classifier

This system makes usage of an android smartphone that runs a TensorFlow lite CNN model to detect artificially ripened fruits. The proposed system has an efficiency of 91% in the identification of the fruits ripened artificially.

CS357-DIP

DimensionalityRedux-PCA-vs-Autoencoders

Comparative study of PCA and Autoencoders for effective dimensionality reduction, assessed through PSNR and SSIM metrics.

DSP-lab

EC204-DSD-Lab

EC205-Analog-Lab

EC211-DSP-Lab

EC211 Digital Signal Processing Lab

EC302-VLSI-Design-Lab

EC302-VLSI-Design-Lab

EC704-VLSI-Design-Automation

EC704 - VLSI Design Automation

EC792-HPCA-Lab

EC802-Low-Power-VLSI-Design

EC802 - Low Power VLSI Design

EC806-DDFPGA-Lab

EC-806

first-repo

My first github repository

MIPS-5-Stage-Pipeline-Project

This project involves the implementation and simulation of a MIPS 5-stage pipelined processor using Verilog. The implementation is based on the MIPS architecture as outlined in the "Computer Organization and Design: The Hardware/Software Interface" and "Digital Design and Computer Architecture"

MIPS-single-cycle

MIPS single cycle Verilog implementation based on Computer Organization and Design The Hardware software Interface by David A. Patterson and John L. Hennessy.

moon-pi-Impulse

RISC-SPM

This project involves the development and enhancement of a RISC Stored-Program Machine (RISC SPM), based on the architecture detailed in "Advanced Digital Design with the Verilog HDL" by Michael D. Ciletti.

the-pinbo

Hello world, this is my profile

Verilog-HDL-Reference

verilog