bluespec

There are 1 repository under bluespec topic.

WangXuan95 / BSV_Tutorial_cn
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。
bluespec bsv bluespec-systemverilog fpga verilog hardware-description-language hdl
Language:Bluespec 596
cambridgehackers / connectal
Connectal is a framework for software-driven hardware development.
bluespec fpga hardware verilog zynq
Language:Bluespec 172
mit-plv / kami
A Platform for High-Level Parametric Hardware Specification and its Modular Verification
coq hardware-verification bluespec proof-assistant hardware-description-language
Language:Rocq Prover 160
p4fpga / p4fpga
P4-14/16 Bluespec Compiler
p4c fpga switch hardware-architectures compiler bluespec networking routing prototype
Language:Bluespec 87
thotypous / alterajtaguart
Altera JTAG UART wrapper for Bluespec
jtag uart bluespec altera usb-serial-adapters hardware-libraries
Language:C 25
CTSRD-CHERI / RVBS
RISC-V BSV Specification
bluespec isa risc-v riscv rtl
Language:Bluespec 21
chipsalliance / OmnixtendEndpoint
Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.
asic bluespec coherence fpga tilelink omnixtend
Language:Bluespec 18
thoughtpolice / yosys-bluespec
Yosys plugin for synthesis of Bluespec code
bluespec fpga
Language:C++ 15
cambridgehackers / bsvtokami
Translates Bluespec SystemVerilog to Kami for use with the coq proof assistant.
bluespec coq compiler formal-verification
Language:Python 11
mchanphilly / vscode-bsv
Bluespec SystemVerilog extension for VS Code
bluespec bluespec-systemverilog syntax-highlighting vs-code-extenstion
Language:Bluespec 11
Raamakrishnan / bsv-for-vscode
Bluespec System Verilog language extension for Visual Studio Code
bluespec bluespec-systemverilog vscode vscode-language vscode-extension vscode-snippets
Language:Bluespec 10
jaytlang / risc-y
Six stage RISC-V processor supporting the RV32I instruction set
risc-v bluespec
Language:C 8
thotypous / altsourceprobe
Altera JTAG Source/Probe wrapper for Bluespec
debugging jtag hardware-libraries bluespec
Language:Tcl 8
pbing / J1_BSV
Forth CPU J1 in Bluespec SystemVerilog (BSV)
bluespec bluespec-systemverilog j1
Language:Verilog 7
Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project
Implementation of Vector Reduce Min and Vector Negation ASIC Hardware, plus a toy CPU, memory and custom ISA for demo. Can be compiled to Verilog. Demos include fib series computations using custom ISA (and custom assembly) and some vector programs.
bluespec bluespec-systemverilog bluespec-systemverilog-language processor-design processor-architecture vector-processor ram bus hardware hardware-designs hardware-acceleration processor vlsi-cad vlsi vlsi-physical-design vlsi-design
Language:Bluespec 7
thotypous / simple-mips
Simple MIPS µC for educational purposes
mips board hardware-architectures bluespec
Language:C 7
yuyuranium / bluespec-cmake
CMake modules for building Bluespec targets
bluespec bluespec-systemverilog bluespec-systemverilog-language cmake cmake-modules nix nix-flake
Language:CMake 6
GnosGnas / Side-Channel-Analysis
Repository for various experiments done during Aug'21 to Mar'21 related to Side-channel-analysis of Shakti's AES accelerators
aes bluespec fpga shakti tvla
Language:Verilog 5
kammoh / bluelight
Hardware implementation of Lightweight Cryptography candidates in Bluespec SystemVerilog.
bluespec bsv lwc fpga cryptocore-interface cryptography hardware systemverilog
Language:Verilog 5
haohao022 / bluespec-lab
北航高等计组实验
buaa bluespec
Language:C 3
JoyenBenitto / flame_thrower
Flame thrower is a on-chip network router written in bluespec system verilog
bluespec network-on-chip on-chip-network
Language:Bluespec 3
jsburke / rv-bitmanip
Implementation of proposed RISC-V xbitmanip instructions in BlueSpec
risc-v bluespec bitmap
Language:Bluespec 3
megabyde / bsv-listings
Bluespec SystemVerilog language definition for the LaTeX listings package
bluespec latex bluespec-systemverilog-language
Language:TeX 3
DevJPM / BSV-Stuff
To toy around with Bluespec-SystemVerilog and my Basys3 board
bsv bluespec bluespec-systemverilog basys3
Language:Bluespec 2
MarcosFagli / Redes_ImplementacaoTCPServer
Implementação do protocolo TCP para a disciplina de Redes de Computadores da Universidade Federal de São Carlos - UFSCar
verilog bluespec-systemverilog bluespec cpp
Language:C++ 2
mhrtmnn / BSpartan
Collection of projects using Verilog and Bluespec on the Spartan Edge Accelerator FPGA Board
bluespec verilog vivado fpga
Language:Bluespec 2
thotypous / keccak-bsv
Bluespec SystemVerilog implementation of the Keccak primitive (SHA-3)
cryptography sha3 keccak bluespec hardware-designs
Language:Bluespec 2
johnmaxrin / AF754
A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance
bluespec bluespec-systemverilog bluespec-systemverilog-language cordic cordic-algorithm hardware hdl systemverilog verilog vhdl
Language:Verilog 1
jsburke / bsv-cores
RISC-V cores based on Bluespec's Piccolo and Flute
risc-v bluespec processor-architecture easy-to-use easy-to-expand
Language:Python 1
pbing / fsm_bsv
FSM coding styles in BSV
bluespec bluespec-systemverilog state-machine
Language:Verilog 1
pbing / Wishbone_BSV
Wishbone/Bluespec Systemverilog Transactors
bluespec bluespec-systemverilog wishbone
Language:Verilog 1
seanpm2001 / Learn-BlueSpec
📚️ A repository for showcasing my knowledge of the BlueSpec programming language, and continuing to learn the language.
bluespec gpl3 gplv3 bluespec-lang bluespec-language learn-bluespec learn-bluespec-lang learn-bluespec-language
Language:Bluespec 1
seanpm2001 / SNU_2D_ProgrammingTools_IDE_BlueSpec
⌨️ The BlueSpec programming language IDE submodule for SNU Programming Tools (2D Mode)
bluespec bluespec-lang bluespec-language gpl3 gplv3 ide programming snu snu-2d snu-2d-programming-tools snu-2d-programmingtools snu-development snu-programming-tools snu2d-programmingtools snu2dprogramming-tools snu2dprogrammingtools snuprogramming-tools snuprogrammingtools web-development web-ide
Language:Bluespec 1
thotypous / AcqSys
Low-cost modular acquisition and stimulation system for neuroscience
hardware-designs cpld neuroscience bluespec
Language:Bluespec 1
xushengj / BluespecSystemVerilog-NotepadPlusPlus
Bluespec System Verilog syntax highlighting for Notepad++
syntax-highlighting bluespec bluespec-systemverilog bluespec-systemverilog-language notepad-plus-plus
1
hce / blueook
Ook!-interpreter in Bluespec System Verilog
bluespec fpga ook
Language:Bluespec

bluespec

WangXuan95 / BSV_Tutorial_cn

cambridgehackers / connectal

mit-plv / kami

p4fpga / p4fpga

thotypous / alterajtaguart

CTSRD-CHERI / RVBS

chipsalliance / OmnixtendEndpoint

thoughtpolice / yosys-bluespec

cambridgehackers / bsvtokami

mchanphilly / vscode-bsv

Raamakrishnan / bsv-for-vscode

jaytlang / risc-y

thotypous / altsourceprobe

pbing / J1_BSV

Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project

thotypous / simple-mips

yuyuranium / bluespec-cmake

GnosGnas / Side-Channel-Analysis

kammoh / bluelight

haohao022 / bluespec-lab

JoyenBenitto / flame_thrower

jsburke / rv-bitmanip

megabyde / bsv-listings

DevJPM / BSV-Stuff

MarcosFagli / Redes_ImplementacaoTCPServer

mhrtmnn / BSpartan

thotypous / keccak-bsv

johnmaxrin / AF754

jsburke / bsv-cores

pbing / fsm_bsv

pbing / Wishbone_BSV

seanpm2001 / Learn-BlueSpec

seanpm2001 / SNU_2D_ProgrammingTools_IDE_BlueSpec

thotypous / AcqSys

xushengj / BluespecSystemVerilog-NotepadPlusPlus

hce / blueook