vlsi-physical-design

There are 21 repositories under vlsi-physical-design topic.

limbo018 / DREAMPlace
Deep learning toolkit-enabled VLSI placement
deep-learning gpu-acceleration pytorch vlsi vlsi-physical-design vlsi-placement
Language:C++ 888
OpenTimer / OpenTimer
A High-performance Timing Analysis Tool for VLSI Systems
static-timing-analysis sta vlsi vlsi-circuits vlsi-physical-design cpp17 parallel-computing circuit-simulator verilog electronic-design-automation computer-aided-design eda cad circuit-simulation circuit-analysis
Language:Verilog 671
AUCOHL / DFFRAM
Standard Cell Library based Memory Compiler using FF/Latch cells
verilog vlsi vlsi-physical-design vlsi-circuits electronics-design asic-design
Language:Verilog 161
cuhk-eda / dr-cu
Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
eda routing vlsi-physical-design
Language:C++ 137
OpenTimer / Parser-Verilog
A Standalone Structural Verilog Parser
cpp17 flex bison-yacc computer-aided-design electronic-design-automation eda verilog vlsi-physical-design vlsi-circuits circuit
Language:Verilog 99
luckyrantanplan / nthu-route
VLSI EDA Global Router
vlsi vlsi-physical-design vlsi-circuits router eda globalrouter electronic-design-automation ispd lattice-graph multi-maze-routing
Language:C++ 76
coriolis
lip6 / coriolis
Coriolis VLSI EDA Tool (LIP6)
eda vlsi-physical-design
Language:C++ 73
AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
asic openlane openlane-flow sky130 vlsi vlsi-physical-design rtl2gds
67
chengengjie / salt
Steiner Shallow-Light Tree for VLSI Routing
graph-algorithms routing vlsi-physical-design eda
Language:C++ 57
OpenTimer / Parser-SPEF
A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
static-timing-analysis cpp17 computer-aided-design electronic-design-automation eda sta parasitic spef vlsi vlsi-physical-design vlsi-circuits circuits
Language:C++ 57
shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In this project, a PicoRV32a SoC is taken and then the RTL to GDSII Flow is implemented with Openlane using Skywater130nm PDK. Custom-designed standard cells with Sky130 PDK are also used in the flow. Timing Optimisations are carried out. Slack violations are removed. DRC is verified
vlsi-physical-design risc-v electronics-engineering
Language:Verilog 52
ieee-ceda-datc / RDF-2019
DATC RDF
vlsi vlsi-physical-design eda vlsi-cad ieee-ceda ieee-ceda-datc design-flow vlsi-design-flow cad design-automation placement routing clock-tree logic-synthesis
Language:Verilog 50
VLSI-Physical-Design-Automation
twweeb / VLSI-Physical-Design-Automation
Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
eda fixed-outline global-placement global-routing nthu physical-design-automation two-way-min-cut vlsi vlsi-cad vlsi-design vlsi-floorplan vlsi-physical-design vlsi-placement vlsi-routing
Language:C++ 49
ShonTaware / OpenSource_Physical_Design
This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
open-source openlane-flow sky130 vlsi-physical-design
43
hibagus / 64pointFFTProcessor
Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.
digital-signal-processing fast-fourier-transform fpga-accelerator signal-processing vlsi-design vlsi-physical-design vlsi-project
Language:Verilog 35
jinwookjungs / lefdef_util
A LEF/DEF Utility.
vlsi vlsi-physical-design lef def-parser def placement vlsi-placement bookshelf lef-parser datc-rdf
Language:Prolog 32
UdayaShankarS / TCL-Scripting
Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference
tcl-scripts vlsi-cad vlsi-physical-design
Language:Tcl 32
andrsmllr / magic_vlsi_examples
Some simple examples for the Magic VLSI physical chip layout tool.
asic vlsi vlsi-physical-design
30
VardhanSuroshi / VLSI-ASIC-Design-Flow
This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out
openlane opensource risc-v rtl vlsi vlsi-design vlsi-physical-design asic-design skywater
Language:Verilog 22
meeeeet / RTL-to-GDS-Implementation-of-SerDes
asic-design openroad rtl2gds verilog vlsi-physical-design
Language:Verilog 21
aasthadave9 / Advanced-Physical-Design-Using-OpenLANE-Sky130
This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130
asic openlane sky130 rtl2gds vlsi-physical-design linux openroad open-source hardware
19
fayizferosh / yosys-tcl-ui-report
5 Day TCL begginer to advanced training workshop by VSD
bash linux open-source opentimer shell-scripting static-timing-analysis synthesis tcl tcl-extensions tcl-procedures tcl-programming vlsi-physical-design workshop yosys eda-tools csv hardware-description-language
Language:Verilog 18
curry0622 / VLSI-Physical-Design-Automation
NTHU CS6135 VLSI Physical Design Automation (2022 Fall)
eda nthucs vlsi vlsi-pda vlsi-physical-design
Language:Prolog 17
ganeshgore / spydrnet-physical
This is a SpyDrNet Plugin for a physical design related transformations
automation vlsi-physical-design netlist hdl verilog spydrnet
Language:Python 16
jnestor / CADApps
VLSI CAD Algorithm Visualizations implemented as Java Applications
vlsi-physical-design visualizations java-applications lafayette-cadapps cadapplets
Language:Java 16
lip6 / alliance
Alliance VLSI CAD Tools (LIP6)
eda vlsi-physical-design
Language:C 16
en9inerd / SimAn
Standard cell placement (global and detailed) tool based on modified algorithm “simulated annealing”
vlsi-physical-design algorithm placer simulated-annealing standard-cells vlsi cpp
Language:C++ 12
harshithsn / Universal-Shift-Register
This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-source EDA tool which gives RTL to GDSII flow.
openlane openlane-flow universal-shift-register vlsi-physical-design vlsi
Language:Verilog 11
karthik-r-rao / VLSI_Physical_Design_Tool
A simple tool to demonstrate the physical design steps of VLSI Design Flow.
vlsi vlsi-physical-design vlsi-cad vlsi-project vlsi-design
Language:Python 9
Koyama-Tsubasa / VLSI_Physical_Design_Automation
Coursework of NTHU CS613500 VLSI Physical Design Automation
eda physical-design-automation two-way-min-cut vlsi vlsi-floorplan vlsi-physical-design nthu fixed-outline vlsi-placement vlsi-routing cad iccad partitioning-algorithms
Language:C++ 8
virginrobotics / 5-Stage-2.92-Ghz-CMOS-VCO
This is a documentation of the steps involved in designing a VCO on the SYNOPSYS Custom Compiler - 28nm PDK
analog vlsi-physical-design
8
jnestor / PlacementApp
Animation of VLSI Placement/Floorplanning using Simulated Annealing or Iterative Improvement
cadapps cadapplets lafayette-cadapps vlsi-physical-design visualization placement simulated-annealing
Language:Java 7
Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project
Implementation of Vector Reduce Min and Vector Negation ASIC Hardware, plus a toy CPU, memory and custom ISA for demo. Can be compiled to Verilog. Demos include fib series computations using custom ISA (and custom assembly) and some vector programs.
bluespec bluespec-systemverilog bluespec-systemverilog-language bus hardware hardware-acceleration hardware-designs processor processor-architecture processor-design ram vector-processor vlsi vlsi-cad vlsi-design vlsi-physical-design
Language:Bluespec 7
vlsi-cmos-inverter-design-magic
trojanink / vlsi-cmos-inverter-design-magic
VLSI Design, Magic, OpenCircuitDesign,CMOS VLSI Design, CMOS Inverter Magic
vlsi-physical-design vlsi-circuits vlsi cmos pmos magic inverter circuit
7
Lawrence-Leung / YogurtNet
Entries for the 2023 5th National College Student Integrated Circuit EDA Elite Challenge. SoC chip physical layout static IR drop prediction project based on methods such as image processing and NLP unsupervised learning.
cnn electronic-design-automation ir-drop machine-learning physical-layout-analysis power-network signoff soc-design u-net u-net-pytorch unsupervised-learning vlsi-physical-design word2vec pix2pix
Language:Python 6
A-Primer-For-Physical-Design-Automation
neeraj1397 / A-Primer-For-Physical-Design-Automation
This repository contains python code snippets that implement several algorithms for automating the VLSI Physical Design process. This is based on the learnings from the course - EE5333W (Introduction to Physical Design Automation) at IITM.
algorithms asic-design python3 vlsi-cad vlsi-physical-design eda vlsi-design vlsi-pda
Language:Jupyter Notebook 6

vlsi-physical-design

limbo018 / DREAMPlace

OpenTimer / OpenTimer

AUCOHL / DFFRAM

cuhk-eda / dr-cu

OpenTimer / Parser-Verilog

luckyrantanplan / nthu-route

lip6 / coriolis

AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop

chengengjie / salt

OpenTimer / Parser-SPEF

shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK

ieee-ceda-datc / RDF-2019

twweeb / VLSI-Physical-Design-Automation

ShonTaware / OpenSource_Physical_Design

hibagus / 64pointFFTProcessor

jinwookjungs / lefdef_util

UdayaShankarS / TCL-Scripting

andrsmllr / magic_vlsi_examples

VardhanSuroshi / VLSI-ASIC-Design-Flow

meeeeet / RTL-to-GDS-Implementation-of-SerDes

aasthadave9 / Advanced-Physical-Design-Using-OpenLANE-Sky130

fayizferosh / yosys-tcl-ui-report

curry0622 / VLSI-Physical-Design-Automation

ganeshgore / spydrnet-physical

jnestor / CADApps

lip6 / alliance

en9inerd / SimAn

harshithsn / Universal-Shift-Register

karthik-r-rao / VLSI_Physical_Design_Tool

Koyama-Tsubasa / VLSI_Physical_Design_Automation

virginrobotics / 5-Stage-2.92-Ghz-CMOS-VCO

jnestor / PlacementApp

Sooryakiran / Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project

trojanink / vlsi-cmos-inverter-design-magic

Lawrence-Leung / YogurtNet

neeraj1397 / A-Primer-For-Physical-Design-Automation