rv32

There are 1 repository under rv32 topic.

neorv32
stnolting / neorv32
:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
risc-v soft-core vhdl fpga soc microcontroller processor cpu riscv system-on-chip openocd embedded rv32 neorv32 verilog gdb asic safety asip rtl
Language:C 1421
lowRISC / ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
hardware cpucore risc-v rv32
Language:SystemVerilog 1243
RISC-V-Guide
mikeroyal / RISC-V-Guide
RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.
android-app computer-architecture cpu-profiling hypervisor optimize peripherals platformio processor processor-architecture risc-processor risc-v riscv riscv-emulator riscv64 rv32 sbc sel4 simulator tensoflow-lite virtualization
Language:Assembly 449
jupiter
andrescv / jupiter
RISC-V Assembler and Runtime Simulator
riscv risc-v rv32 simulator riscv-simulator risc assembler runtime-simulator education asm runtime rv32g
Language:JavaScript 404
franzflasch / riscv_em
Simple risc-v emulator, able to run linux, written in C.
risc-v riscv emulator c embedded-c embedded-systems riscv-em uclinux rv64 rv32 riscv-emulator riscv32 riscv64 riscv-linux linux risc-v64 risc-v-emulator
Language:C 126
AngeloJacobo / RISC-V
Design implementation of the RV32I Core in Verilog HDL with Zicsr extension
risc-v verilog rv32i rv32 cpu riscv 5-stage-pipeline formal-verification
Language:Verilog 43
rob-ng15 / Silice-Playground
Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice
fpga de10nano fomu ulx3s forth j1-cpu risc-v rv32 rv32i rv32im rv32imc
Language:C 34
enthusi / lz4_rv32i_decode
LZ4 decoder in assembly for RiscV RV32IC
assembler assembly risc-v riscv32 lz4 rv32 rv32i bare-metal-programming riscv longan-nano longan-nano-board
Language:Assembly 9
taneroksuz / wolv-z0
Wolv Z0 is a RISC-V CPU core
risc-v hardware cpu rv32 core fpga
Language:SystemVerilog 5
taneroksuz / wolv-z7
Wolv Z7 is a RISC-V CPU core with floating point unit
core cpu fpga fpu hardware risc-v rv32
Language:SystemVerilog 5
lucianobajr / risc-v
datapath risc-v with pipeline
risc-v rv32 pipeline datapath computer-organization
Language:Verilog 1
taneroksuz / wolv-z1
Wolv Z1 is a RISC-V CPU core
core cpu fpga hardware risc-v rv32
Language:SystemVerilog 1
taneroksuz / wolv-z3
Wolv Z3 is a RISC-V CPU core
core cpu fpga hardware risc-v rv32
Language:SystemVerilog 1
taneroksuz / wolv-z4
Wolv Z4 is a RISC-V CPU core with floating point unit
core cpu fpga fpu hardware risc-v rv32
Language:SystemVerilog 1
lucianobajr / Computer-Organization-I
Repository regarding the Practical Works of the Computer Organization discipline
benchmark matplotlib risc-v-assembly assembler risc-v json numerical-base datapath rv32 perf valgrind heapsort buble-sort quicksort radix-sort single-cycle
Language:Verilog 0
stephan-cr / riscv-sim
educational risc-v rv32
Language:Rust

rv32

stnolting / neorv32

lowRISC / ibex

mikeroyal / RISC-V-Guide

andrescv / jupiter

franzflasch / riscv_em

AngeloJacobo / RISC-V

rob-ng15 / Silice-Playground

enthusi / lz4_rv32i_decode

taneroksuz / wolv-z0

taneroksuz / wolv-z7

lucianobajr / risc-v

taneroksuz / wolv-z1

taneroksuz / wolv-z3

taneroksuz / wolv-z4

lucianobajr / Computer-Organization-I

stephan-cr / riscv-sim