verilog-components

There are 8 repositories under verilog-components topic.

ultraembedded / cores
Various HDL (Verilog) IP Cores
asic audio fpga i2s rtl sdram spi sram uart usb verilator verilog verilog-components verilog-hdl
Language:Verilog 841
ZipCPU / sdspi
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
sd-card sd-interface fpga verilog-components verilog verilator wishbone wishbone-bus spi-interface axi emmc sdio
Language:Verilog 328
ZipCPU / dblclockfft
A configurable C++ generator of pipelined Verilog FFT cores
fft fpga gplv3 verilator verilog verilog-components
Language:C++ 248
TimRudy / ice-chips-verilog
IceChips is a library of all common discrete logic devices in Verilog
7400 verilog-components eda logic-circuit fpga iverilog open-hardware digital-logic icestorm
Language:Verilog 149
neelkshah / MIPS-Processor
5-stage pipelined 32-bit MIPS microprocessor in Verilog
computer-architecture computer-organization computer-organisation microprocessor microprocessors bits-pilani verilog verilog-hdl verilog-project verilog-programs verilog-components verilog-snippets verilog-simulator mips-processor mips-architecture mips-instructions
Language:Verilog 135
spam-1
Johnlon / spam-1
Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my research and learning. See also the Hackaday.IO project. https://hackaday.io/project/166922-spam-1-8-bit-cpu
alu assembler logism cpu rom verilog verilog-components homebrew-cpu 8bit ttl cmos design vhdl
Language:Verilog 69
TimRudy / uart-verilog
A simple 8 bit UART implementation in Verilog, with tests and timing diagrams
digital-logic eda fpga icestorm iverilog open-hardware verilog-components hardware-designs serialport uart-interface uart-verilog
Language:Verilog 36
adibis / Interrupt_Controller
An 8 input interrupt controller written in Verilog.
verilog verilog-project verilog-components hdl
Language:Verilog 27
wyvernSemi / mem_model
High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model
memory-model verilog-components verilog simulation test-bench verilog-testbenches avalon axi cosimulation dpi-c ghdl nvc pli questasim verilator vhdl vivado-simulator
Language:VHDL 25
ZipCPU / wbfmtx
A wishbone controlled FM transmitter hack
fm-transmitter fpga wishbone wishbone-bus hack verilog verilog-components
Language:Verilog 23
Wissance / QuickSPI
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
spi-hdl spi axi spi-ip-core spi-pld spi-fpga spi-interface verilog-spi axi-interfaces bit-oriented-spi soft-spi hard-spi dragster-spi fpga xilinx-fpga xilinx-vivado altera verilog-snippets verilog-hdl verilog-components
Language:Verilog 21
BrianHGinc / Verilog-Floating-Point-Clock-Divider
Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter using fractional floating point division.
clock-generator verilog verilog-components verilog-hdl
Language:Verilog 20
emrealci / FPGA-Verilog
Practices related to the fundamental level of the programming language Verilog.
comparator fpga frequency-divider hardware-designs hdl latch multiplexer sr-latch verilog verilog-components verilog-project xilinx-fpga
Language:Verilog 12
EhsanShahbazii / Digital-VLSI-System-Design-Projects
سورس کد پروژه های درس طراحی سیستم های دیجیتال برنامه پذیر دانشگاه تبریز مقطع کارشناسی رشته مهندسی کامپیوتر
verilog verilog-code verilog-components verilog-project vlsi
Language:Verilog 7
IzyaSoft / EasyHDLLib
A coocbook of HDL (primarily Verilog) modules
verilog-components verilog-library hdl clock-divider fifo frequency-analysis verilog frequencies fpga verilog-snippets verilog-hdl xilinx-fpga altera
Language:Verilog 6
ferhatozkan / Digital-Logic-Design-Project
University of Marmara, CSE3015 2018 Fall Project
logic-design cpu verilog verilog-components java assembler assembly logisim
Language:Java 4
University-projects
trojanink / University-projects
Some of the projects I developed during my studies at University of Thessaly, Electrical & Computer Engineering Dpt.
university computer-engineering-dpt studies projects c c-language c-language-math homework assembly assembly-language assembly-language-programming verilog-project verilog-code verilog-components verilog
Language:C 4
RockingAayush / 32bit-floating-point-adder
digital-electronics ieee754 verilog verilog-components
Language:Verilog 3
Jamesits / verilog-basic-blocks
数电作业
verilog verilog-components xilinx-ise
Language:Verilog 1
josephkb87 / VerilogBasics
Basics of Verilog implementation
systemverilog verilog verilog-code verilog-components verilog-hdl
Language:SystemVerilog 1
klsavaj / Computer-Architecture-VerilogCodes-Sheet
computer-architecture verilog-components modules
Language:HTML 1
NotZombieFood / VerilogModules
Verilog modules for reference
verilog-snippets verilog verilog-components
Language:C 1
seyang1 / pub-ips
systemverilog systemverilog-hdl verilog verilog-hdl asic asic-design riscv verilog-code verilog-components verilog-project openrisc gpgpu gpgpu-computing gpu-computing processor processor-architecture processor-design
1
InvincibleJuggernaut / Synthesis
A collection of digital circuits using Verilog.
verilog verilog-programs verilog-components logic-gates digital-circuits
Language:Verilog 0
verilogcodesarchive / verilogutils
verilog verilog-components verilog-hdl verilog-codes button-debounce comprator comprator-3bit comprator-8bit cordic-cir cordic-hyp pipeline div-pipelined pipeline-registers ram-infer sign-extender verilog-modules
Language:Verilog 0
mohanadtalat91 / Verilog-HDL
A Verilog HDL code
computer-architecture verilog verilog-code verilog-components verilog-hdl verilog-programs
Language:Verilog
Safa-Taha / Nand2Tetris
Nand2Tetris using Verilog
computer-architecture nand2tetris verilog-components verilog-hdl
Language:Verilog
shrujan0274 / HDLBits-submissions
Solutions for 100+ questions in HDLBits using verilog
verilog verilog-code verilog-components verilog-hdl verilog-project
Language:Verilog

verilog-components

ultraembedded / cores

ZipCPU / sdspi

ZipCPU / dblclockfft

TimRudy / ice-chips-verilog

neelkshah / MIPS-Processor

Johnlon / spam-1

TimRudy / uart-verilog

adibis / Interrupt_Controller

wyvernSemi / mem_model

ZipCPU / wbfmtx

Wissance / QuickSPI

BrianHGinc / Verilog-Floating-Point-Clock-Divider

emrealci / FPGA-Verilog

EhsanShahbazii / Digital-VLSI-System-Design-Projects

IzyaSoft / EasyHDLLib

ferhatozkan / Digital-Logic-Design-Project

trojanink / University-projects

RockingAayush / 32bit-floating-point-adder

Jamesits / verilog-basic-blocks

josephkb87 / VerilogBasics

klsavaj / Computer-Architecture-VerilogCodes-Sheet

NotZombieFood / VerilogModules

seyang1 / pub-ips

InvincibleJuggernaut / Synthesis

verilogcodesarchive / verilogutils

mohanadtalat91 / Verilog-HDL

Safa-Taha / Nand2Tetris

shrujan0274 / HDLBits-submissions