verilog-components

There are 8 repositories under verilog-components topic.

• ultraembedded / cores

  Various HDL (Verilog) IP Cores

  verilogrtlverilog-hdlfpgaverilatorverilog-componentsasicsdramsramaudioi2sspiuartusb
  Language:Verilog 637

• ZipCPU / dblclockfft

  A configurable C++ generator of pipelined Verilog FFT cores

  fftfpgagplv3verilatorverilogverilog-components
  Language:C++ 203

• ZipCPU / sdspi

  SD-Card controller, using either SPI, SDIO, or eMMC interfaces

  axiemmcfpgasd-cardsd-interfacesdiospi-interfaceverilatorverilogverilog-componentswishbonewishbone-bus
  Language:Verilog 138

• TimRudy / ice-chips-verilog

  IceChips is a library of all common discrete logic devices in Verilog

  7400verilog-componentsedalogic-circuitfpgaiverilogopen-hardwaredigital-logicicestorm
  Language:Verilog 117

• neelkshah / MIPS-Processor

  5-stage pipelined 32-bit MIPS microprocessor in Verilog

  bits-pilanicomputer-architecturecomputer-organisationcomputer-organizationmicroprocessormicroprocessorsmips-architecturemips-instructionsmips-processorverilogverilog-componentsverilog-hdlverilog-programsverilog-projectverilog-simulatorverilog-snippets
  Language:Verilog 103
• spam-1

  Johnlon / spam-1

  Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my research and learning. See also the Hackaday.IO project. https://hackaday.io/project/166922-spam-1-8-bit-cpu

  aluassemblerlogismcpuromverilogverilog-componentshomebrew-cpu8bitttlcmosdesignvhdl
  Language:Verilog 60

• adibis / Interrupt_Controller

  An 8 input interrupt controller written in Verilog.

  hdlverilogverilog-componentsverilog-project
  Language:Verilog 21

• ZipCPU / wbfmtx

  A wishbone controlled FM transmitter hack

  fm-transmitterfpgahackverilogverilog-componentswishbonewishbone-bus
  Language:Verilog 19

• Wissance / QuickSPI

  Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface

  spi-hdlspiaxispi-ip-corespi-pldspi-fpgaspi-interfaceverilog-spiaxi-interfacesbit-oriented-spisoft-spihard-spidragster-spifpgaxilinx-fpgaxilinx-vivadoalteraverilog-snippetsverilog-hdlverilog-components
  Language:Verilog 18

• TimRudy / uart-verilog

  A simple 8 bit UART implementation in Verilog, with tests and timing diagrams

  digital-logicedafpgaicestormiverilogopen-hardwareverilog-componentshardware-designsserialportuart-interfaceuart-verilog
  Language:Verilog 13

• BrianHGinc / Verilog-Floating-Point-Clock-Divider

  Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter using fractional floating point division.

  clock-generatorverilogverilog-componentsverilog-hdl
  Language:Verilog 11

• emrealci / FPGA-Verilog

  Practices related to the fundamental level of the programming language Verilog.

  comparatorfpgafrequency-dividerhardware-designshdllatchmultiplexersr-latchverilogverilog-componentsverilog-projectxilinx-fpga
  Language:Verilog 10

• IzyaSoft / EasyHDLLib

  A coocbook of HDL (primarily Verilog) modules

  verilog-componentsverilog-libraryhdlclock-dividerfifofrequency-analysisverilogfrequenciesfpgaverilog-snippetsverilog-hdlxilinx-fpgaaltera
  Language:Verilog 6

• EhsanShahbazii / Digital-VLSI-System-Design-Projects

  سورس کد پروژه های درس طراحی سیستم های دیجیتال برنامه پذیر دانشگاه تبریز مقطع کارشناسی رشته مهندسی کامپیوتر

  verilogverilog-codeverilog-componentsverilog-projectvlsi
  Language:Verilog 5

• wyvernSemi / mem_model

  High speed C/C++ based behavioural Verilog memory model

  memory-modelsimulationtest-benchverilogverilog-componentsverilog-testbenches
  Language:C 4

• ferhatozkan / Digital-Logic-Design-Project

  University of Marmara, CSE3015 2018 Fall Project

  logic-designcpuverilogverilog-componentsjavaassemblerassemblylogisim
  Language:Java 3
• University-projects

  trojanink / University-projects

  Some of the projects I developed during my studies at University of Thessaly, Electrical & Computer Engineering Dpt.

  assemblyassembly-languageassembly-language-programmingcc-languagec-language-mathcomputer-engineering-dpthomeworkprojectsstudiesuniversityverilogverilog-codeverilog-componentsverilog-project
  Language:C 3

• Jamesits / verilog-basic-blocks

  数电作业

  verilogverilog-componentsxilinx-ise
  Language:Verilog 2

• yvesemmanuel / introduction_verilog

  digital systems

  verilog-projectverilog-componentsverilogdigital-systems
  Language:Verilog 2

• yvesemmanuel / microwave

  second project - Digital System

  verilogverilog-componentsdigital-systemsverilog-project
  Language:Verilog 2

• josephkb87 / VerilogBasics

  Basics of Verilog implementation

  systemverilogverilogverilog-codeverilog-componentsverilog-hdl
  Language:SystemVerilog 1

• klsavaj / VerilogCode-All-Modules-COA-Notes

  computer-architectureverilog-componentsmodules
  Language:HTML 1

• NotZombieFood / VerilogModules

  Verilog modules for reference

  verilog-snippetsverilogverilog-components
  Language:C 1

• seyang1 / pub-ips

  systemverilogsystemverilog-hdlverilogverilog-hdlasicasic-designriscvverilog-codeverilog-componentsverilog-projectopenriscgpgpugpgpu-computinggpu-computingprocessorprocessor-architectureprocessor-design
  1

• InvincibleJuggernaut / Synthesis

  A collection of digital circuits using Verilog.

  verilogverilog-programsverilog-componentslogic-gatesdigital-circuits
  Language:Verilog 0

• verilogcodesarchive / verilogutils

  verilogverilog-componentsverilog-hdlverilog-codesbutton-debouncecompratorcomprator-3bitcomprator-8bitcordic-circordic-hyppipelinediv-pipelinedpipeline-registersram-infersign-extenderverilog-modules
  Language:Verilog 0

• mohanadtalat91 / Verilog-HDL

  A Verilog HDL code

  computer-architectureverilogverilog-codeverilog-componentsverilog-hdlverilog-programs
  Language:Verilog