logic-design
There are 2 repositories under logic-design topic.
DrWaleedAYousef / Teaching
Teaching Materials for Dr. Waleed A. Yousef
Language:Mathematica 1016ParhamP / Natural_Logic_Interpreter
Automatically interpret and validate nested natural logic arguments based on rules of inference and propositional logic
Language:Python 117shayanop / Water-Level-Meter
Water Level Meter
ysyesilyurt / Metu-CENG
All the homeworks, studies and projects I've done at Metu-CENG
Language:Jupyter Notebook 69beetlex-io / EventNext
EventNext is logic interface design actors components for .net core
Language:C# 42ericm / newlogic
Circuit Builder Desktop Application (like mmlogic) made with Electron + React Typescript. Compatible with Windows, Mac and Linux.
Language:TypeScript 32- Language:Python 23
- Language:Jupyter Notebook 20
venkat-0706 / codemind-c
As an Ignite Coder, solved numerous problems using C programming, demonstrating expertise in algorithms, problem-solving, and efficient coding for technical challenges.
Language:C 18fcayci / sv-digital-design
SystemVerilog examples for a digital design course
Language:SystemVerilog 13tunacinsoy / CSE
All the homeworks, testers and projects done at Marmara University, Computer Science & Engineering
Language:Java 12- Language:Java 11
stdgregwar / elve
ELVE : ELVE Logic Visualization Engine
Language:C++ 11VitorgsRuffo / Building-The-Hack-Computer
This is a personal project which purpose is to learn computer architecture by implementing the Hack Computer.
Language:Scilab 11Noamv7 / Matrix-Multiplication-Using-Systolic-Arrays-Chip-Design-and-Verification
This project is focused on the design and verification of digital logic circuits, particularly targeting chip design using Verilog, SystemVerilog, and SVA. The main objectives included designing modules compliant with industry standards such as APB (Advanced Peripheral Bus), memory systems, and systolic matrix multiplication.
Language:Verilog 8anthonyabeo / digital_circuits
A collection of digital logic circuits
Language:SystemVerilog 7- Language:C++ 7
AhmedHamed3699 / AES-Encryption
An AES encryption and decryption project that follows SPI (Serial Peripheral Interface) specification. Implemented in Verilog
Language:Verilog 6marwan-9 / digital-logic-circuits-simulator
Windows application for designing and simulating digital logic circuits, written in C++ using CMU graphics library.
Language:C 5- Karnaugh-Map
RezaGooner / Karnaugh-Map
The program in GUI that show and minimize with Karnaugh-Map in Python & C++
Language:C++ 5 - Language:Swift 4
DopeBiscuit / IEEE-Digital-IC-Design
This repo is for my IEEE ASU Student Branch Digital IC Design workshop, an introduction to digital design using Verilog, this is a documentation of my tasks.
Language:Verilog 4ferhatozkan / Digital-Logic-Design-Project
University of Marmara, CSE3015 2018 Fall Project
Language:Java 4AMRYB / 4221-to-Seven-Segment-Decoder
4221-to-Seven-Segment Decoder for Logic Design course — A combinational circuit converting custom 4-bit binary inputs into signals to drive a common-cathode 7-segment display, using basic logic gates (NOT, AND, OR).
andresrodriguez55 / aSimple8-BitProcessor
Simple microprocessor in SystemVerilog.
Language:C 3AparneetDey / CopyTube
Practice project to learn basics of backend.
Language:JavaScript 3- simcirjs
matiasmicheletto / simcirjs
A SimCirJS fork with enhanced functionalities
Language:JavaScript 3 - Arithmetic-Logic-Unit-Project
michaelehab / Arithmetic-Logic-Unit-Project
Educational Project for Logic Design 1 course taken during Fall 2021 semester.
zeynepozalp / Coursework
Homeworks given at Department of Computer Engineering, Middle East Technical University.
Language:C 33ein39 / MultiSolver
The Idea is a gui program can solve most of the problems that faces students in courses like mathematics and physics And it also have another branch for helping the students with their time management and provide the students with materials
Language:C++ 2ImRanjbar / TeachingAssistant-Resources
A collection of assignments, workshops, and educational materials created during my teaching assistant journey at the University of Isfahan.
Language:C++ 2krish1925 / Texas-Holdem-Poker
Implementation of Texas Hold'em Poker on Verilog(Basys3 FGPA)
Language:Verilog 2n1colasf / Obligatorio-DDA
Obligatorio Diseño y Desarrollo de Aplicaciones (Semestre 4 - Marzo 2023) Calificación: 36/40
Language:Java 2nnakul / IITKGP-CSE-Sem04
The repository contains all the assignments completed as a course-work of the 4th semester.
Language:C++ 2SpencerDeMera / 8-Bit-ALU-Circuit
This project is my design of a basic ALU that can perform addition, subtraction, and bitwise logic operations. This project was designed in Logisim Evolution and implemented with TTL logic chips on breadboards.
wyvernSemi / Articles
Collected article documents in PDF
