There are 2 repositories under logic-design topic.
Teaching Materials for Dr. Waleed A. Yousef
Automatically interpret and validate nested natural logic arguments based on rules of inference and propositional logic
All the homeworks, studies and projects I've done at Metu-CENG
EventNext is logic interface design actors components for .net core
SystemVerilog examples for a digital design course
ELVE : ELVE Logic Visualization Engine
This is a personal project which purpose is to learn computer architecture by implementing the Hack Computer.
All the homeworks, testers and projects done at Marmara University, Computer Science & Engineering
A collection of digital logic circuits
An AES encryption and decryption project that follows SPI (Serial Peripheral Interface) specification. Implemented in Verilog
Homeworks given at Department of Computer Engineering, Middle East Technical University.
Simple microprocessor in SystemVerilog.
University of Marmara, CSE3015 2018 Fall Project
A SimCirJS fork with enhanced functionalities
Educational Project for Logic Design 1 course taken during Fall 2021 semester.
Two's complement two bit multiplier developed in Proteus
This repo is for my IEEE ASU Student Branch Digital IC Design workshop, an introduction to digital design using Verilog, this is a documentation of my tasks.
A Windows application for designing and simulating digital logic circuits, written in C++ using CMU graphics library.
A digital design for the SPI protocol, delivered as a project for the logic design course
Obligatorio Diseño y Desarrollo de Aplicaciones (Semestre 4 - Marzo 2023) Calificación: 36/40
Hexadecimal 7 segment display
Combinational Multiplier Using verilog
Logic design homework using AND, OR, XOR for Computer Organization class.
16 bit MIPS microprocessor on CircuitSim
Primer proyecto para el curso de Diseño Digital. La idea es hacer una aplicación referente al código Hamming utilizando el lenguaje de programación Python.
16x12 Memory Unit Logic Design Using Logisim
The repository contains all the assignments completed as a course-work of the 4th semester.
This program is the software part of a Robot Line Maze-solver Project. Implemented on a raspberry pi using Direct-Register Control on Raspberry Pi. This project was made in attempt to get a better grasp of the following topics: Kernels and Linux, Direct-Register Control, Recursive Algorithms, Logic Design, Solidwork and 3D printing
Design and implementation an arithmetic unit that is capable of adding, subtracting and multiplying two signed magnitude numbers, and displays the result of the operation performed along with some additional flags regarding the operation and the result using Logisim.
Carry Select Adder Using verilog