OpenHW Group

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

cvfpu

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

cvw

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.

cv32e40x

4 stage, in-order, compute RISC-V core based on the CV32E40P

programs

Documentation for the OpenHW Group's set of CORE-V RISC-V cores

core-v-cores

CORE-V Family of RISC-V Cores

core-v-mcu

This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.

cv32e40s

4 stage, in-order, secure RISC-V core based on the CV32E40P

cva6-sdk

CVA6 SDK containing RISC-V tools and Buildroot

cva5

The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.

core-v-xif

RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions

cv-hpdcache

RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores

cve2

The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.

corev-gcc

core-v-sw

Main Repo for the OpenHW Group Software Task Group

openhwgroup.org

OpenHW Group is a not-for-profit, global organization driven by its members and individual contributors where hardware and software designers collaborate in the development of open-source cores, related IP, tools and software. OpenHW provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices.

core-v-mcu-devkit

This is the CORE-V MCU DevKit project, hosting the open-source artifacts for the CORE-V MCU Development Kit.

corev-llvm-project

cv32e40x-dv

CV32E40X Design-Verification environment

riscv-ovpsim-corev

tristan-unified-access-page

Unified Access Page for the TRISTAN project

core-v-polara-apu

The OpenPiton Platform

corev-binutils-gdb

cva6-platform

CVA6-platform is a multicore CVA6 with CV-MESH software and regression platform

cv-mesh

.github

cv32e20-dv

infra

Issues related to the OpenHW Group infra (GtHub, Mattermost, ...)