pbing

ibex_wb

RISC-V Ibex core with Wishbone B4 interface

Sudoku-Solver

Swift implementation of Peter Norvig's constraint based solver.

J1_BSV

Forth CPU J1 in Bluespec SystemVerilog (BSV)

j1_forth

J1 Forth cross compiler

CORDIC_BSV

Synthesizeable CORDIC processor in Bluespec SystemVerilog (BSV)

CORDIC

Synthesizeable CORDIC processor in SystemVerilog.

v-usb

A Firmware-Only USB implementation for Atmel's AVR Microcontrollers

bsc

Bluespec Compiler (BSC)

common_cells

Common SV components

CORDIC_BSV2

Synthesizeable CORDIC processor in Bluespec SystemVerilog (BSV)

ct202313

Solving the puzzle in c't 2023/13

ct202315

Solving the puzzle in c't 2023/15

ct202325

Vigenère Chiffre in Haskell

ct202328

Breaking Vigenère chiffre with Kasiski test in Haskell

fibonacci

Compare algorithms for computing Fibonacci numbers in Common Lisp

freedom-e-sdk

Open Source Software for Developing on the Freedom E Platform

fsm_bsv

FSM coding styles in BSV

HeadPhoneAmp

Headpone amplifier with TPA6120A2

ibex

Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.

mastermind

Playing with Mastermind algorithms

project-euler-hs

Project Euler in Haskell

ptester

Portable test harmess package

riscv-dbg

RISC-V Debug Support for our PULP Cores

riscv-sodor

educational microarchitectures for risc-v isa

sokoban

Sokoban game in a terminal

Tic-Tac-Toe

Tic-Tac-Toe in Common Lisp

verilator_basics

vty

A high-level ncurses alternative written in Haskell

Wishbone

Check Wishbone B4 variants

Wishbone_BSV

Wishbone/Bluespec Systemverilog Transactors