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《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
Implementation of CORDIC Algorithms Using Verilog
Fast CORDIC algorithm for ATAN2 for Arduino
Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CORDIC like as DDS (sine / cosine generator)
accurate scientific calculator with fractions inside
Descriptive implementation of CORDIC algorithms (based on Ray Andraka's paper) in python using Jupyter notebook
📐 CORDIC in Vectoring Mode, Computer Aided Design of Digital Systems course, University of Tehran
YAC - Yet Another CORDIC Core
Implementation of the CORDIC machine in circular rotation mode
CORDIC Processor Implementation (Vanilla)
sin, cos, sinh, cosh, e^x and sqrt in ARM using CORDIC
Mata Kuliah EL. Collaboration with Sisdig As. Rifki, Vicco, Ken Jims, and Nabil.
Summary of projects I did in VLSI desing.
A project in which Xilinx's CORDIC (COordinate Rotation DIgital Computer) IP is used as the hardware accelerator and the processor transfers the computational load to the hardware accelerator.
A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance
Calculating sine and cosine using CORDIC algorithm in MIPS assembly. Project for Computer Architecture (ARKO) laboratories at Warsaw University of Technology.
CORDIC FPGA implemtation on 7 segment display
Cordic system implemented in VHDL FPGA (Spartan3E)
SystemVerilog CORDIC block that converts from an input phase (sawtooth wave) to a sine wave
Algorithms for calculating sine and cos with an input in degree. For now it only works for quadrant I. (This code is just for demonstration, not for implementation)
The data captured from the Petalinux Environment over the Uart interface will be transmitted to the CORDIC IP and the results will be transmitted to the PC over the Uart.
arctan and exponential functions has been implemented with Cordic IP core in Xilinx ISE14.6.
Source files and notes of my Final Year Project, as part of an MEng in Electronics and Information Engineering from Imperial College London