ShonTaware

SRAM_SKY130

Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns

OpenSource_Physical_Design

This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK

LowPower

Various low power labs using sky130

RISC-V_Core_4_Stage

RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set

FPGA_Design_Fabric_Architecture

This repository contains all the information studied and created during the FPGA - Fabric, Design and Architecture workshop. It is primarily focused on a complete FPGA flow using the maximum open-source tools.

vsdsram_caravel

https://caravel-user-project.readthedocs.io

ShonTaware.github.io

TL-V_Projects

openlane_environment_setup

This script builds openlane and all its dependencies on an Ubuntu (only) System.

redirect.github.io