digitaldesign

There are 1 repository under digitaldesign topic.

ahmed-agiza / EDAViewer
EDAV: Open-Source EDA Viewer; render design LEF/DEF files in your browser!
webgl serverless hardware viewer eda server-side-rendering serverless-side-rendering cgo pixijs hardware-design vlsi lef def opendb digitaldesign electronic-design-automation physical-synthesis opendb-database def-viewer layout
Language:JavaScript 65
SimpleSoC
siorpaes / SimpleSoC
Very simple Cortex-M1 SoC design based on ARM DesignStart
soc arm cortex-m xilinx-fpga xilinx-vivado designstart digitaldesign systemonchip fpga-soc fpga cortex-m1 hardware-designs verilog mcu
Language:C 9
tharunchitipolu / RISC-V-32I-based-core-with-Advanced-Extensible-Interface
5 stage pipelined RISC-V core with AXI3 bus protocol between the directly mapped cache and main memory.
arm axi3 cache computer-architecture digitaldesign pipeline processor risc-v systemverilog testbench verilog verilog-hdl
Language:Verilog 9
ahegazy / HDL
This repository contains scripts that I create through my digital design course in Verilog, VHDL, SystemVerilog etc..
hdl vhdl verilog systemverilog digitaldesign
Language:Verilog 6
Vishakha7501 / Sky-130-RTL-Design-and-Synthesis-Workshop-using-Verilog
RTL Design and Synthesis Workshop using Verilog with Sky130 Technology
digitaldesign gtkwave rtl simulation verilog yosys loops optimization optimization-methods synthesizer vlsi vlsi-design
5
GabbedT / Arithmetic-Circuits
This repository contains different modules which execute arithmetic operations.
arithmetic circuit rtl systemverilog digitaldesign
Language:SystemVerilog 4
GabbedT / FIFO
FIFO buffer library. Written and verified in SystemVerilog. Can be synthetised in ASIC or FPGA.
hdl fifo systemverilog buffer digitaldesign asic fpga
Language:SystemVerilog 4
Mohamedsalem80 / VHDL-tutorial
VHDL tutorial
digitaldesign learning tutorial vhdl
Language:VHDL 4
abxhr / University
A repo to store the coursework I do in college! 🎓
college digitaldesign cprogramming object-oriented-programming discrete-mathematics datastructures-algorithms database-management-systems
Language:Java 2
mshetty149 / Hardware-Designs
RTL Designs along with testbenches to verify them written in Verilog. Icarus Verilog an open source simulator was used for simulations.
verilog rtl vlsi digitaldesign
Language:Verilog 1
mshetty149 / Placer-and-router-software-for-VLSI
Placer and Router for standard cells
vlsi digitaldesign
Language:NewLisp 1
darter-funny / fidget-spinner-republic
For all the fidget spinneteers out there
fidget-spinner fidgetspinner digitaldesign technical-drawing technology hacktoberfest
0
Escaper2 / DigitalDesign-Engineer-School
Школа инженера от DigitalDesign
asp-net-core csharp digitaldesign docsvision javascript react sql-query
Language:HTML 0
Myriam2002 / Digital_lock_for_a_safe
Basic digital lock system for safes, employing logic gates 🔐
digitaldesign flipflop logic-gates
0
serhaturtis / DD-LTC2311-16
IP Module For LTC2311 ADC
adc digitaldesign fpga ltc2311 systemverilog
Language:SystemVerilog 0
VladMarianCimpeanu / digital-design-project-
images equalizer in VHDL
vhdl polimi retilogiche digitaldesign
Language:TeX 0
ahagmann / dtc
Digital Design Timing Constraints
constraints sdc digitaldesign timing
Language:Jupyter Notebook
AntEncarnacion / digital-systems-playground
Educational repo for storing my practice sessions with digital systems as well as solutions to online courses or university courses I take. These implementations are done in VHDL or Verilog.
vhdl digitaldesign digital-design
Language:VHDL
AnuragSChatterjee / NUS-EE2026-Digital-Design
Took a module on Digital Design Fundamentals during my year 2 of my undergraduate studies of Electronic Circuits done using VHDL and Verilog, with a final project on FPGA Programmed Flappy Bird Gaming System using Sound and Light effects.
digitaldesign logic-programming verilog
Arna-Maity / Verilog_Modules
This repository contains a few useful Verilog modules
verilog-modules verilog verilog-programs digitaldesign
Language:Verilog
jacobhuesman / digital_design
Miscellaneous stuff from the NDSU Digital Design Class
mathematica vhdl digitaldesign
Language:Mathematica
marconip / magazines-presentation-interface
a quick interface to any digital device that features magazines as a product
digitaldesign interface system
Language:CSS
sidhantp1906 / 4-bit-first-divider
4 bit divider design using first divider algorithm
digitaldesign divider rtldesign verilog
Language:Verilog
sidhantp1906 / PulseWidthModulation
PWM module using verilig HDL in XILINX ISE
counter digitaldesign pulsewidthmodulation pwm timer verilog
Language:Verilog
z4chh / FPGA_Slot_Machine
A slot machine created in System Verilog. It was built, simulated, synthesized, and implemented in Vivado, for use on the Xilinx Basys 3 board.
digitaldesign fpga-board fpga-programming systemverilog systemverilog-hdl vivado
Language:SystemVerilog

digitaldesign

ahmed-agiza / EDAViewer

siorpaes / SimpleSoC

tharunchitipolu / RISC-V-32I-based-core-with-Advanced-Extensible-Interface

ahegazy / HDL

Vishakha7501 / Sky-130-RTL-Design-and-Synthesis-Workshop-using-Verilog

GabbedT / Arithmetic-Circuits

GabbedT / FIFO

Mohamedsalem80 / VHDL-tutorial

abxhr / University

mshetty149 / Hardware-Designs

mshetty149 / Placer-and-router-software-for-VLSI

darter-funny / fidget-spinner-republic

Escaper2 / DigitalDesign-Engineer-School

Myriam2002 / Digital_lock_for_a_safe

serhaturtis / DD-LTC2311-16

VladMarianCimpeanu / digital-design-project-

ahagmann / dtc

AntEncarnacion / digital-systems-playground

AnuragSChatterjee / NUS-EE2026-Digital-Design

Arna-Maity / Verilog_Modules

jacobhuesman / digital_design

marconip / magazines-presentation-interface

sidhantp1906 / 4-bit-first-divider

sidhantp1906 / PulseWidthModulation

z4chh / FPGA_Slot_Machine