flipflop
There are 0 repository under flipflop topic.
piyalidas10 / Quiz-Flip-Flop-Angular
Quiz game with Flip Flop animation in Angular 12
Language:TypeScript 12DevMajed / Digital-Logic_and-Design
Digital Logic Design using pen and paper to design with Analog discovery 2, and using Verilog for synthesizing. these are some of my junior year labs for Digital Electronics
Language:Verilog 2- Language:Java 2
SuhailAhamed2000 / FlipFlop
In electronics, a flip-flop is a special type of gated latch circuit. There are several different types of flip-flops. The most common types of flip flops are:TFF,DFF,JKFF,SRFF
- Language:Verilog 2
Zannatul-Naim / Digital-System-Design
Digital System Design Lab Codes using Verilog
Language:Verilog 2Quiz flipflop with One Question at a time and next, previous links in Angular 8
Language:TypeScript 1- Language:Verilog 0
Abrar171041075 / Digital-System-Design
This repository contains several VHDL codes of signal processing
Language:VHDL 0ChandradithyaJ / 24hrClock
A model of a 24hr clock using D flipflops and logic gates in Logisim
0FarshidKeivanian / Optimization-of-JK-Flip-Flop-Layout-with-Minimal-Average-Power-of-Consumption-based-on-ACOR-Fuzzy-A
FuzzyACOR-Algorithm (Adaptive fuzzy metaheuristic based optimisation algorithm)
Language:MATLAB 0Ishikashah2510 / Tic-Tac-Toe-Logisim-
Tic tac toe implementation using logisim
0Myriam2002 / Digital_lock_for_a_safe
Basic digital lock system for safes, employing logic gates 🔐
0Shakil-RU / Verilog_HDL
"Verilog_HDL" repository contains hardware description language (HDL) code written in Verilog for various digital logic and electronic designs."
Language:Verilog 0Steinwerfer777 / FPGA-Projects-
This contains all of my FPGA projects using Intel Quartus Prime IDE with microprocessor hardware during University including test benches. Will update when I track more down.
Language:VHDL 0Frankline-Sable / Asynchronous-Down-Counter-With-74LS112-
⏱ A counter whereby each flipflop output drives the CLOCK input of the next flipflop. It is asynchronous in that the flipflops do not change states in exact synchronism with the applied clock pulses. Its counts are descending
Mvrtn-design / TC-Dise-o_VHDL_de_sistemas_secuenciales
Diseño de un circuito secuencial con entrada de datos x de 1 bit, una entrada de reset y una entrada de reloj. El sistema es un detector de secuencia que genera una salida z de 1 bit con ‘1’ cuando los últimos cuatro bits recibidos en x son 0101. El circuito se diseña de diversas maneras, cada una de ellas con una descripción en VHDL
Language:VHDL
