ic-design
There are 3 repositories under ic-design topic.
hankshyu / ICLab-2023
Spring 2023 NYCU (prev. NCTU) Integrated Circuit Design Laboratory (ICLab)
Language:Verilog 146- Language:Python 88
pontazaricardo / Verilog_Calculator_Matrix_Multiplication
This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
Language:Verilog 53shawntsai0312 / NTUEE_DIGITAL_CIRCUIT_LAB_24FALL
NTUEE Digital Circuit Lab 24Fall
Language:SystemVerilog 39- Language:Coq 24
gh-code / libCircuit
libCircuit is a C++ Library for EDA software development
Language:Verilog 18AhmedAmrAbdellatif / Multi-Clock-Domain-System
Design & Implementation of Multi Clock Domain System using Verilog HDL
Language:Verilog 14akira2963753 / Low-Cost-AI-Accelerator-Based-on-TPU
This is my senior project, we aim to design a Low-cost-AI-Accelerator based on Google's Tensor Processing Unit.
Language:Verilog 10Aperture-Electronic / Blockdiagramm.Avalonia
Blockdiagramm is a graphical block design tool for IC design
Language:C# 8EGelphman97 / Optical-Filter-Synthesis
This repository has code for a Python program that synthesizes an optical filter
Language:Python 7dragonman225 / opamp-generator
Generate folded-cascode opamp parameters with interactive CLI.
Language:JavaScript 6electronics-and-drives / conference-deadlines
Deadlines for Conferences which are relevant to the research topics of E&D
Language:JavaScript 5panhaiqi / Awesome-Python-Simulator
Awesome Python Simulator & Electronic Design Tools(work in progress)
SkylerYCW / NCTU_2022_Spring_ICLab
NCTU 2022 Spring Integrated Circuit Design Laboratory
Language:Verilog 50mhu / gds-render
A tool for rendering GDS2 layout files to PDF (using cairographics) or to TikZ code.
Language:TeX 2Blockdiagramm is a graphical block design tool for IC design
Language:Vue 2- Language:Common Lisp 2
NTUEE IC Design 24Spring Final
Language:Verilog 2- Language:Python 1
mo2menwael / Low-Power-Configurable-Multi-Clock-Digital-System
Design & Implementation of Low Power Configurable Multi Clock Domain System using Verilog HDL
Language:Verilog 1- Language:Verilog 1
- Language:Jupyter Notebook 1
NTUEE IC Design 23Fall HW3
Language:Verilog 1NTUEE IC Design 23Fall HW4
Language:Verilog 1- Language:C++ 1
xkllkx / Physical_Design
N25K200 2023 NCKU-PHYSICAL DESIGN for NANOMETER IC's Projects
Language:MATLAB 1- 0
danielbboy111 / CPEN-311
CPEN 311: Digital Systems Design
0- Language:HTML 0
wei-shen-wang / Computer-aided_VLSI_System_Design
2023 Fall Computer-aided VLSI System Design (CVSD)
Language:Verilog 0- Language:Python
A Ngspice ASCII rawfile parser written in Javascript.
Language:JavaScript- Language:Python
naumisst / icdesign-inverter-oscillator-opamp
Analog Circuit Design Repository Design and Implementation of Inverter, Oscillator, and Op-Amp ( Project of ICDEC MBKM )
Language:Shellpravesh-sandal / Digital-IC-Design-Journey-with-cadence-virtuoso
A practical day-by-day journey exploring Digital IC Design using Cadence Virtuoso — from schematics to layouts, DRC/LVS checks, parasitic extraction, and timing analysis.
QabasAK / GLADE-FullAdder
Designed and tested a CMOS full adder using XOR, AND, OR gates, and an inverter, verifying functionality through DRC, LVS, LPE, and Spice3 simulations with NAND and GLADE implementations.
