chip-design

There are 0 repository under chip-design topic.

JackonYang / paper-reading
比做算法的懂工程落地，比做工程的懂算法模型。
computer-architecture arxiv chip-design llm mlir tvm
Language:Jupyter Notebook 251
librelane / librelane
ASIC implementation flow infrastructure
asic asic-design chip-design digital-design eda electronic-design-automation openlane librelane
Language:Python 160
patrickschulz / openPCells
Parametric layout generator for digital, analog and mixed-signal integrated circuits
pcells cadence lua parametric-cells integrated-circuits analog chip-design layout-automation
Language:C 56
mabrains / sky130_klayout_pdk
Skywater 130nm Klayout Device Generators PDK
analog-layout chip-design custom-layout pcells pdk skywaters
Language:Python 31
arhamhashmi01 / rv32i-pipeline-processor
This repository contain the implementaton of RV32I 5-Stage-Pipeline-Processor based on RISC-V ISA and designed on Verilog
asic-design chip-design computer-architecture gtkwave hardware-designs microprocessor pipeline-processor risc-v verilog vhdl vlsi 5-stage-pipelined-processor rv32i rv32i-processor verilator rv32im vivado
Language:Verilog 22
ttihp-verilog-template
TinyTapeout / ttihp-verilog-template
Submission template for Tiny Tapeout IHP shuttles - Verilog HDL Projects
chip-design tinytapeout verilog vlsi
Language:Verilog 20
ojasvi-shah / Advanced-Physical-Design-Using-OpenLANE--Ojasvi-Shah
Advanced Physical Design Using OpenLANE/SKY130 course notes by Ojasvi Shah
chip-design openlane riscv virtualbox vlsi
15
popovych-labs / open-npu
Open NPU is an open-source project dedicated to creating a flexible, extensible, and high-performance neural processing unit (NPU) architecture. Open NPU aims to democratize access to cutting-edge neural processing technology for machine learning and AI applications.
asic chip-design high-performance-computing ml npu
14
flaport / condalayout
Conda + KLayout
conda klayout eda epda design chip chip-design electronics photonics layout
Language:Dockerfile 11
marcelwa / ls4ai
Hack4Her: Logic Synthesis for AI
ai fpga machine-learning chip-design logic-synthesis
Language:Jupyter Notebook 10
Noamv7 / Matrix-Multiplication-Using-Systolic-Arrays-Chip-Design-and-Verification
This project is focused on the design and verification of digital logic circuits, particularly targeting chip design using Verilog, SystemVerilog, and SVA. The main objectives included designing modules compliant with industry standards such as APB (Advanced Peripheral Bus), memory systems, and systolic matrix multiplication.
chip-design logic-design sva systemverilog verification verilog systolic-arrays functional-coverage matrix-multiplication questasim amba-apb
Language:Verilog 8
XS-MLVP / xcomm
xspcomm encapsulates the DPI-based digital circuit and provides various high-level language operation interfaces.
chip-design multilanguage verification
Language:C++ 8
OJB-Quantum / Generative-Layout-Notebooks
GDSII/OASIS layouts, including fractals, generated in working Google Colab notebooks. Layout previews are plotted as 2D graphics before exporting.
gds gdsii generative-design layout lithography microfabrication nanofabrication oasis fractals open-source quantum quantum-hardware metamaterial-design metamaterials automation chip-design chip-design-automation gdstk colab-notebook google
Language:Jupyter Notebook 7
gh0stintheshe11 / Static-Logic-PRSG-chip
Carleton University / ELEC4609 - Integrated Circuit Design and Fabrication / Project: Static Logic PRSG (Pseudo Random Sequence Generator) chip design, fabrication and testing.
chip-design chip-fabrication chip-testing pseudo-random-sequence-generator carleton-university elec4609
3
DolbyUUU / Awesome-Surveys-of-LLM4EDA
A curated list of surveys, reviews, and awesome lists on the application of Large Language Models (LLMs) and AI for Electronic Design Automation (EDA) and chip design.
ai4eda chip-design domain-specific-llms eda electronic-design-automation llm llm4eda
1
electricalgorithm / introduction-to-VHDL-projects
VHDL Projects that I've created during the course Programmable Logic Devices in West Pomeranian University of Technology in Szczecin.
chip-design comparator mux seven-segment traffic-light-controller adder-circuit digtial-design four-digit-seven-segment-driver line-buffer ring-counter
Language:VHDL 1
vyges / vybox-lite
VyBox Lite: One-click Codespaces environment for trying Vyges chip/IP development in your browser.
browser-ide chip-design cocotb eda github-codespaces open-source-silicon semiconductor systemverilog verilog vyges vyges-ip vybox vybox-lite
Language:JavaScript 1
ecolleran / SoupVenture-Chip
Final Project for Digital Integrated Circuits. SoupVenture Chip.
chip-design finite-state-machine logic tapeout verilog
Language:Verilog 0
gundasrikar / IC-Design-IHC-Cadence-Virtuoso-Analog-to-Digital-Circuit
rc-extraction electromagnetic-simulation layouts schematic-diagram chip-design pre-post-layout
0
gundasrikar / IC-Design-VCO-Cadence-Virtuoso-Digital-Circuit
electromagnetic-simulation layout-analysis schematics chip-design pre-post-layout rc-extraction digital-circuit-design
0
12kerti / ir-drop-model-dashboard
Simulated a realistic chip design problem (IR drop) and solved it using end-to-end machine learning:
chip-design dataset-generation ir-drop machine-learning-algorithms performance-metrics vlsi-design
Language:Python
ml-chips / ml-chips.github.io
Designing chips for Artificial Intelligence, a blog style book on designing AI chips and an overview of the current landscape
accelerators chip-design llms
Language:HTML
mubashir1osmani / m4
build custom asics and fpga's using llms.
ai chip-design computer-use gpu hardware-designs llm
Language:Python
OakyMacintosh / OpenQubit
OpenSource Qubit implementations for small business and enthusiasts
chip chip-design qpu-design quantum-computing qubits
Language:Python
vyges / community
🏗️ Central hub for Vyges community discussions, issues, feature requests, and collaboration
asic chip-design fpga hardware-development hardware-ip metadata-standards open-source semiconductor ip-repository silicon-design community discussions documentation support
zukhri2106 / 8-Bit-computer-CPU-Design
A 8-bit computer CPU is designed using Logic Circuit software. Logic Circuit is educational software for designing and simulating digital logic circuits.
chip-design

chip-design

JackonYang / paper-reading

librelane / librelane

patrickschulz / openPCells

mabrains / sky130_klayout_pdk

arhamhashmi01 / rv32i-pipeline-processor

TinyTapeout / ttihp-verilog-template

ojasvi-shah / Advanced-Physical-Design-Using-OpenLANE--Ojasvi-Shah

popovych-labs / open-npu

flaport / condalayout

marcelwa / ls4ai

Noamv7 / Matrix-Multiplication-Using-Systolic-Arrays-Chip-Design-and-Verification

XS-MLVP / xcomm

OJB-Quantum / Generative-Layout-Notebooks

gh0stintheshe11 / Static-Logic-PRSG-chip

DolbyUUU / Awesome-Surveys-of-LLM4EDA

electricalgorithm / introduction-to-VHDL-projects

vyges / vybox-lite

ecolleran / SoupVenture-Chip

gundasrikar / IC-Design-IHC-Cadence-Virtuoso-Analog-to-Digital-Circuit

gundasrikar / IC-Design-VCO-Cadence-Virtuoso-Digital-Circuit

12kerti / ir-drop-model-dashboard

ml-chips / ml-chips.github.io

mubashir1osmani / m4

OakyMacintosh / OpenQubit

vyges / community

zukhri2106 / 8-Bit-computer-CPU-Design