terasic

There are 0 repository under terasic topic.

RomeoMe5 / DDLM
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
ddlm verilog labs terasic-de10-lite terasic hse miem schoolmips mips mips-architecture verilog-designs fsm alu quartus modelsim dmk-press verilog-book system-verilog tcl quartus-prime
Language:Verilog 55
electro-logic / CameraVision2
Connect a modern, high-resolution camera to an FPGA and easily develop your applications
camera de0-nano fpga ft232h jtag mipi um232h usb metadata raw tiff terasic csharp diy nios nios2 vhdl de1-soc optics vision
Language:C 13
amaranth-farm / fpga-mandelbrot
FPGA mandelbrot accelerator via high speed/super speed USB
fpga mandelbrot fractals terasic altera usb2 fractal usb usb3 xilinx kintex fractal-algorithms fractal-images fractal-rendering hdl
Language:Python 12
RomeoMe5 / De10-Lite_HDL_GPS
Simple verilog project with ability to connect to GPS module using UART and parse NMEA coordinates using finite state machine
gps de10-lite terasic-de10-lite quartus terasic miem hse uart ubx rtcm nmea neo-6 nmea-0183
Language:Verilog 9
ThePituLegend / RISC-V_DE10-Nano
This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.
riscv risc-v riscv64 riscv-asm riscv-assembly de10-nano fpga altera altera-fpga terasic rocketchip chipyard ucberkeley
Language:Verilog 9
LispEngineer / systemverilog-hdmi
Implement HDMI output using only SystemVerilog and an Analog Devices ADV7513
cyclone-v fpga hdl hdmi rtl systemverilog terasic terasic-c5g verilog
Language:SystemVerilog 3
RomeoMe5 / Terasic-SMK-driver-use-cases
Terasic Servo Motor Kit (SMK) usage examples
smk gpio servo-motor-kit terasic miem hse fpga de10-lite pwm quartus
3
RomeoMe5 / A-Cute-CAR_Bluetooth
Управление двуколесным роботом из набора A-Cute Car с помощью Bluetooth
a-cute-car bluetooth bluetooth-hc-06 de0-nano fpga gpio hse miem pwm terasic uart
Language:Verilog 2
Insper / DE10-Standard-v.1.3.0-SystemCD
Copy of: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1081
de10-standard terasic
Language:SystemVerilog 1
jimfangx / DE2-70-Bringup
Assorted Verilog that brings up different elements (VGA, Ethernet, Switches, LED, LCD, etc.) of the terasIC DE2-70 Development Board.
altera ethernet fpga modelsim nios2 quartus2 terasic verilog vga vga-controller de2-70
Language:C 1
RomeoMe5 / Hummingbird-FPGA-De1-SoC
FPGA Cripto Algorithm Hummingbird
hummingbird hummingbird-algorithm quartus terasic de1-soc quartus-prime ultra-lightweight-cryptography cryptography
Language:HTML 1

terasic

RomeoMe5 / DDLM

electro-logic / CameraVision2

amaranth-farm / fpga-mandelbrot

RomeoMe5 / De10-Lite_HDL_GPS

ThePituLegend / RISC-V_DE10-Nano

LispEngineer / systemverilog-hdmi

RomeoMe5 / Terasic-SMK-driver-use-cases

RomeoMe5 / A-Cute-CAR_Bluetooth

Insper / DE10-Standard-v.1.3.0-SystemCD

jimfangx / DE2-70-Bringup

RomeoMe5 / Hummingbird-FPGA-De1-SoC