caravel

There are 0 repository under caravel topic.

The-OpenROAD-Project / OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
asic 130nm magic netgen yosys openroad skywater openram vlsi system-on-chip soc-design rtl2gds foundry rtl verilog klayout caravel
Language:Python 1223
efabless / caravel
Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
magic yosys caravel picorv32 vexriscv openroad openram sky130
Language:Verilog 257
efabless / caravel_mpw-one
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
caravel sky130 magic picorv32 openram openroad yosys
Language:Verilog 135
0x01be / rudder
Learn, share and collaborate on ASIC design using open tools and technologies
pdk caravel magic klayout eda
Language:Dockerfile 11
kbeckmann / caravel-pll-calculator
PLL configuration generator for the Caravel management core
openlane skywater caravel
Language:Python 10
neevany / caravel-on-heroku
One-button Heroku deploy for the Caravel data exploration platform.
caravel heroku superset airbnb dataexplorer
Language:Python 9
efabless / clear_old
CLEAR is an Open Source FPGA ASIC delivered to you on its development board and its open source software development tools and all the ASIC design tools used to create it.
efpga fpga open-source caravel chipignite openlane openfpga
Language:Verilog 7
efabless / caravel_ibex
An example project that utilizes caravel user space for an ibex based SoC
caravel mpw-two openlane ibex soc
Language:Verilog 3
Bhavuk-HDL / custom-asic
Eight different verilog projects are combined to creat a big custom asic project.
asic caravel fifo hdl nand2tetris ram risc-v spi sram uart verilog
Language:Verilog 2
deepak-rai / druid-caravel-docker
Druid(v0.8.3) Docker Image(with druid-datasketches extension and caravel included) — Edit
druid docker-image caravel druid-datasketches
Language:Shell 0
wrapped_pong
erikvanzijst / wrapped_pong
An ASIC running Pong.
asic caravel silicon ic fpga electronics verilog
Language:Verilog
hwakabh / cnd-caravel-labs
Sample application for CND(Cloud Native Developer) Livefire Caravel Lab
caravel tanzu-kubernetes-grid
Language:Shell

caravel

The-OpenROAD-Project / OpenLane

efabless / caravel

efabless / caravel_mpw-one

0x01be / rudder

kbeckmann / caravel-pll-calculator

neevany / caravel-on-heroku

efabless / clear_old

efabless / caravel_ibex

Bhavuk-HDL / custom-asic

deepak-rai / druid-caravel-docker

erikvanzijst / wrapped_pong

hwakabh / cnd-caravel-labs