130nm

There are 0 repository under 130nm topic.

The-OpenROAD-Project / OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
asic 130nm magic netgen yosys openroad skywater openram vlsi system-on-chip soc-design rtl2gds foundry rtl verilog klayout caravel
Language:Python 1231
open-source-pdks
google / open-source-pdks
Index of the fully open source process design kits (PDKs) maintained by Google.
asic eda globalfoundries openroad pdk silicon skywater 130nm 180nm gf180mcu sky130
82
skywater-pdk-libs-sky130_fd_pr_reram
google / skywater-pdk-libs-sky130_fd_pr_reram
SKY130 ReRAM and examples (SkyWater Provided)
130nm asic eda ngspice openroad pdk reram silicon skywater xyce
36
lakshmi-sathi / avsdpll1v8_caravel
PLL x8 clock multiplier IP integrated onto the Efabless Caravel SoC
open-mpw google-skywater-pdk 130nm phase-locked-loop
Language:Verilog 4
3x10e8 / cochlea_sky130
Mixed-mode silicon cochlea implementing wavelet processing in 130nm skywater process
skywater wavelet mixed-signal-chips switched-capacitor cochlea mixed-signal audio-processing 130nm integrated-circuits asic xschem magic
Language:Tcl 1
fossi_cochlea
3x10e8 / fossi_cochlea
Mixed-mode silicon cochlea implementing wavelet processing in 130nm skywater process, embedded in efabless Caravel
magic asic wavelet audio audio-processing mixed-signal integrated-circuits cochlea skywater 130nm switched-capacitor xshem netgen caravel-shuttle
Language:Verilog 1