multipliers

There are 0 repository under multipliers topic.

ehw-fit / tf-approximate
Approximate layers - TensorFlow extension
approximate-computing convolution docker-container multipliers python singularity-container tensorflow tensorflow-library
Language:C 27
PrashanthHC16 / Approximate-Multiplier
Approximate Multipliers of 8bit and 16bit operands, built with approximate compressors.
approximate multipliers verilog
Language:Verilog 10
suoglu / Carry-Save-Multiplier
Parameterized and 4-bit carry save multiplier design
fpga verilog hardware multiplier multipliers
Language:Verilog 6
adityagupta1089 / EEP206-Verilog
Verilog Codes for various digital circuits for labs at IIT Ropar, basic gates, adders & subtractors (half & full), ripple adders, multipliers and code converters.
adder subtractor digital-circuits ripple-adders gates multipliers verilog bcd
Language:Verilog 3
gubbriaco / FPGA-VHDL-Wallace-multiplier
Design and Analysis of an FPGA-based Wallace Multiplier.
excel fpga multiplier multipliers vhdl vivado wallace wallace-method wallace-tree-multiplier xilinx zedboard
Language:VHDL 3
IdleSquadron / IncreMultiplication
idle game thingy.
game idle idle-game incremultiplication incremental-game multipliers
Language:JavaScript 3
Yellowflash-070 / 32-bit-Signed-Vedic-Multiplier
A 32-bit Signed Vedic Multiplier created using Verilog HDL utilising Vedic Mathematic Sutras formed using Carry Lookahead Adders as the basic building blocks.
carry-look-ahead-adder multipliers vedic-mathematics verilog xilinx-vivado signed-unsigned-multiplication 32-bit-multiplication vlsi
Language:Verilog 2
algorhtym / booths_multiplier
Digital design project for a simple integer multiplier using Booth's multiplication algorithm made through ASM design method
algorithmic-state-machine digital-circuit-design digital-design fpga-programming multipliers quartus rtl teroshdl vhdl
Language:VHDL 1
aliansgp / VHDL_Multipliers
Different Multipliers code in VHDL and Comparison
array-muliplier booth-multiplier carry-save-multipliers common-multipliers multipliers vhdl vhdl-code vhdl-coursework vhdl-examples
Language:C 1
gubbriaco / VHDL_scripts
Useful VHDL scripts for hardware description.
adder adders carry-save-adder fpga full-adder kogge-stone kogge-stone-adder multiplier multipliers pynq-platform pynq-z2 ripple-carry-adder vhdl vivado xilinx zedboard
Language:VHDL 1
K4V4NH / Basic-Verilog-Codes
Compiled set of verilog codes for beginners. Can help you with getting started with basics of verilog.
asynchronous bcd beginner-friendly demux digital-circuits hdl iverilog multipliers opcode processor register ripple-adders verilog-programs verilog-project
Language:Verilog 1
irya-senshi / Multipliers-in-Verilog
Verilog Multiplier Implementation
booth-multiplier multipliers verilog-project
Language:Verilog 0
lulunac27a / bingo-game-with-score
Bingo game with score
bingo bingo-game game multiplier multipliers score web web-app webapp javascript js web-game
Language:JavaScript 0
shahed22 / Dadda-8-bit
The computational speed of the dadda multiplier can be enhanced by partitioning the partial products. In process to achieve low power we have considered pass transistor for logical implementation.
algorithms algorithms-implemented asic-design fpga fpga-programming fulladder halfadder multiplier multipliers rtl rtl-design verilog
Language:Verilog 0
ahmedosama07 / 8-bit-multiplier
8 bit multiplier Verilog code
multipliers verilog
Language:Verilog
lulunac27a / typescript-character-typing-game
Character typing game using TypeScript
score streak streaks timer typescript typescript-game typing typing-game game-mode game-modes multiplier multipliers
Language:TypeScript