nios-ii
There are 0 repository under nios-ii topic.
jagumiel / Guitar-Pedal-Effects-on-FPGA
This is my bachelor's degree project. I have used a FPGA to modify audio signal and create different sounds, like distortion, overdrive, echo, reverb...
Language:VHDL 22timot3 / ECE385-Ethernet
ECE 385 Final Project -- Ethernet on MAX10 DE10-Lite FPGA and Nios II soft processor
Language:Verilog 12voldemoriarty / Matmul
Matrix Multiplication in Hardware
Language:C 12xddxdd / zjui-ece385-final
ECE385 Final Project - Raiden Shooter Game - at ZJU-UIUC Institute; w/ 16-bit VGA, Sound and Ethernet
Language:C 12niosii / nios-ii-vscode
Nios II Vscode Extension
Language:Assembly 10codeofmochi / fpga-sound-synthesizer
A digital sound synthesizer on FPGA written in VHDL, C, Python and NodeJS (Terasic DE1-SoC)
Language:VHDL 8vacer25 / Nios_II-VGA-Out
Various VGA video output projects on the NIOS II processor
Language:Assembly 7- NIOSII_EclipseCompProject
robseb / NIOSII_EclipseCompProject
Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...
Language:C 6 alex-precosky / LEDTile
FPGA and RTOS based video display driver for an LED matrix, with HTTP control over WiFi
Language:C 5- Language:Verilog 5
AllenHeartcore / ECE385_UIUC23sp
Ziyuan Chen, ECE385 @ UIUC 23SP
Language:SystemVerilog 4AleksandarLilic / Cyclone_II_SoPC
VHDL hardware accelerators on Cyclone II FPGA with MCU apps in C for Nios II core
Language:C 3- Language:C 3
FedorChervyakov / de10lite-hello-nios2
Hello World from Nios 2
Language:Tcl 1jszhn / ps2-de1soc
Hardware and software interfaces for the PS/2 keyboard/mouse protocol, for Terasic's DE1-SoC platform. Written in SystemVerilog and C.
Language:C 1raksharthchoudhary / NIOS-II-Software-Emulator
Repository of a system to emulate the functioning of an NIOS II chip and be one and done solution for testing assembly code for the NIOS II processor without needing a seperate NIOS II micro controller.
Language:JavaScript 1SakaSerbia / FPGA-DE10-Standard-Simple-Nios2-Project
Designing a simple processor system on FPGA. This is demo project to test FPGA DE10-Standard and develop a simpe Nios2 app.
Language:Verilog 1- Language:Assembly 1
- Language:Verilog 1
- Language:Verilog 1
- Language:Assembly 0
eliherm / Scrolling-Marquee
Scrolling marquee for the Altera DE0 board
Language:C 0- GeMRTOSLanguage:VHDL 0
helakaraa / AES-Algorithm
Implementation of AES Algorithm as a custom hardware using NIOS II processor. VHDL using QUARTUS and ModelSIM.
Language:VHDL 0Frogger-inspired game for a Nios II architecture on Terasic's DE1-SoC platform.
Language:C 0Aabha-J / Asteroid-Shooting-Game
A play on the classic game asteroids by using C to program a NIOS II processor
Language:C- Language:Verilog
AnaWhibley / Practicas_EC
Assembly projects with Altera DE2 - NIOS II
Language:AssemblyCarlosCraveiro / LeNet-5_Moltenware
A LeNet-5 implementation using C language and FPGA, obtaining more performance (Hardware) together with greater versatility (Software), uniting the two worlds. Hardening the Software and Softening the Hardware, to something in between, like Molten Iron, so a Moltenware implementation.
Language:CMax00358 / Embedded_Project-Audio_Player
An embedded system project of an audio player made using Altera Max 10 FPGA, Quartus Prime & NIOS II
Language:C- Language:C
supleed2 / ELEC60011-DSD-CW
Coursework for ELEC60011: Digital System Design - a Quartus project containing a NIOS II soft-core and custom instruction hardware accelerators for the target function
Language:Verilog- Language:Assembly
- Language:Assembly
