dram

There are 2 repositories under dram topic.

liquidctl / liquidctl
Cross-platform CLI and Python drivers for AIO liquid coolers and other devices
corsair evga nzxt liquid-cooler fan-controller power-supply led-controller gigabyte asus dram graphics-card aquacomputer cross-platform driver python hacktoberfest
Language:Python 2102
PlatformLab / RAMCloud
**No Longer Maintained** Official RAMCloud repo
dram fault-tolerance key-value low-latency storage
Language:C++ 481
umd-memsys / DRAMSim2
DRAMSim2: A cycle accurate DRAM simulator
c-plus-plus computer-architecture dram simulator
Language:C++ 242
CMU-SAFARI / ramulator2
Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM standards, emerging RowHammer mitigation techniques). Described in our paper https://people.inf.ethz.ch/omutlu/pub/Ramulator2_arxiv23.pdf
dram memory simulation
Language:C++ 155
mjlaine / mcmcstat
MCMC toolbox for Matlab
mcmc matlab metropolis-hastings adaptive-mcmc dram
Language:MATLAB 81
hdl-util / sdram-controller
Generic FPGA SDRAM controller, originally made for AS4C4M16SA
as4c4m16sa controller dram fpga quartus sdram systemverilog
Language:Verilog 75
CMU-SAFARI / DRAM-Bender
DRAM Bender is the first open source DRAM testing infrastructure that can be used to easily and comprehensively test state-of-the-art DDR4 modules of different form factors. Five prototypes are available on different FPGA boards. Described in our preprint: https://arxiv.org/pdf/2211.05838.pdf
dram fpga rowhammer testing
Language:VHDL 39
blark / a500plus-chipram-expansion
A 1MB chip RAM expansion for the A500+
a500 amiga amiga-hardware dram retrocomputing
28
llopis / dram-tester
Sample Arduino program to test 4164 DRAM chips.
arduino dram 4164
Language:C++ 19
CMU-SAFARI / BEER
BEER determines an ECC code's parity-check matrix based on the uncorrectable errors it can cause. BEER targets Hamming codes that are used for DRAM on-die ECC but can be extended to apply to other linear block codes (e.g., BCH, Reed-Solomon). BEER is described in the 2020 MICRO paper by Patel et al.: https://arxiv.org/abs/2009.07985.
reliability error-correcting-codes hamming-code linear-block-code ecc-schemes experimental-data error-characteristics dram
Language:C++ 17
tukl-msd / DRAMSpec
A High-Level DRAM Timing, Power and Area Exploration Tool
dram estimation currents timings
Language:C++ 16
dovedevic / blimp
A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.
blimp compilers dram processing-in-memory risc-v simulation-framework
Language:C 14
CMU-SAFARI / CLRDRAM
Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of the CLR-DRAM architecture and the baseline architecture used in our ISCA 2020 paper "Luo et al., CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off": https://people.inf.ethz.ch/omutlu/pub/CLR-DRAM_capacity-latency-reconfigurable-DRAM_isca20.pdf
circuit-model dram dram-array-architecture dram-latency
Language:AGS Script 11
saiteja-talluri / Microarchitectural-attacks
Implementation of flush + reload attack to extract private key from the GnuPG implementation of RSA.
rsa flush-reload cache dram
Language:C 10
CMU-SAFARI / EINSim
DRAM error-correction code (ECC) simulator incorporating statistical error properties and DRAM design characteristics for inferring pre-correction error characteristics using only the post-correction errors. Described in the 2019 DSN paper by Patel et al.: https://people.inf.ethz.ch/omutlu/pub/understanding-and-modeling-in-DRAM-ECC_dsn19.pdf.
dram reliability error-correction error-correcting-codes map-estimation statistical-inference simulator
Language:C++ 9
adarshpatil / dve
Improving DRAM Reliability and Performance On-Demand via Coherent Replication [ISCA 2021]
replication dram reliability sockets coherence
Language:Objective-C 7
CMU-SAFARI / HARP
HARP is a memory error profiling algorithm (i.e., for identifying error-prone cells) designed for use with memory chips that use on-die error-correcting codes (ECC). This tool uses Monte-Carlo simulation to evaluate HARP and other error profilers. HARP and this tool are described in the 2021 MICRO paper by Patel et al.: https://arxiv.org/abs/2109.12697.
simulator reliability dram error-correcting-codes error-correction monte-carlo
Language:C++ 7
comsec-group / REM
REGA Model (REM), an accurate DRAM model.
dram model rowhammer
Language:AGS Script 7
ppieczul / c386sx-lt-2mb-memory-module
Commodore C386SX-LT 2MB memory module schematics
vintage-computers commodore dram memory
7
wgurecky / bipymc
Bayesian Inference. Parallel implementations of DREAM, DE-MC and DRAM.
bayesian-inference bayesian inference mcmc mcmc-sampler gaussian-process-regression bayesian-optimization mpi4py mpi mcmc-sampling dream python dram
Language:Python 7
CMU-SAFARI / DRAM-Datasheet-Survey
A survey of manufacturer-provided DRAM operating parameters and timings as specified by DRAM chip datasheets from between 1970 and 2021. This data and its analysis are described in the 2022 paper by Patel et al.: https://arxiv.org/abs/2204.10378
datasheets dram memory survey
6
cdslaborg / paramontex
This is a repository for the ParaMonte library examples. For more information, visit:
bayesian bayesian-inference bayesian-methods bayesian-optimization bayesian-statistics c cpp dram fortran fortran2018 machine-learning markov-chain matlab mcmc mcmc-methods mcmc-sampler parallel paramonte-library python visualization
Language:Jupyter Notebook 5
CMU-SAFARI / DIVA-DRAM
This repository provides characterization data collected over 96 DDR3 SO-DIMMs, related to the following paper: Lee et al., "Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms", SIGMETRICS 2017. https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-paper.pdf
dram reliability
Language:AGS Script 5
CMU-SAFARI / DRAM-Voltage-Study
Experimental study and analysis on the effect of using a wide range of different supply voltage values on the reliability, latency, and retention characteristics of DDR3L DRAM SO-DIMMs
dram experimental-data memory memory-analysis memory-test voltage-scaling voltage memory-latency reliability reliability-data memory-systems dram-characterization energy power performance
Language:AGS Script 5
johnzl-777 / DRAMutils
A library that allows the Arduino UNO to read/write to old DIP-style DRAM chips
dram retro arduino arduino-library arduino-uno
Language:C++ 4
pjattke / awesome-rowhammer
A curated list of awesome Rowhammer papers, tools, and info resources. 👉 Content coming soon, stay tuned!
academic attacks awesome-list ddr3 ddr4 ddr5 defenses dram hardware-security rowhammer hardware-attacks
4
adarshpatil / gem5gpu-hashcache
HAShCache + Intergrated CPU/GPU system simulation setup
simulator gpu cpu dram cache hashcache
Language:C++ 3
Stephen-Arsenault / DRAM-Liberator
DRAM Tester Shield for Arduino Nano
arduino dram opensource 4164
Language:C++ 3
5ayam5 / COL216-Minor
MIPS ISA simulator which implements non-blocking DRAM access
mips-simulator dram
Language:C++ 1
gaomy3832 / energydram
DRAM energy calculation.
dram energy
Language:Python 1
jtsimons / DRAMC
Behavioral architecture of a read/write cycle controller for a DRAM chip.
digital-design dram fpga memory-controller memory-design tcl vhdl
Language:VHDL 1
lmartorella / dram-tester
Tester for DRAM modules
dram testing mcu 8-bit ttl
Language:Makefile 1
mohin7 / dramkit1
Demo: https://mohin7.github.io/dramkit1/
dram
Language:HTML 1
NamhoGim / Master_thesis
Repo for my master thesis
cudnn hbm gpgpu cuda cnn partial-activation-dram dram
Language:TeX 1
ThexXTURBOXx / Raspberry-Pi-DRAM-PUF
Decay-based DRAM PUF for the Raspberry Pi 3B+ implemented on top of rpi-open-firmware
dram puf raspberry-pi dram-puf firmware kernel
Language:C 1
olemon111 / SWP-Tree-BG2
Background Test for SWP-Tree
dram learned-index
Language:C++

dram

liquidctl / liquidctl

PlatformLab / RAMCloud

umd-memsys / DRAMSim2

CMU-SAFARI / ramulator2

mjlaine / mcmcstat

hdl-util / sdram-controller

CMU-SAFARI / DRAM-Bender

blark / a500plus-chipram-expansion

llopis / dram-tester

CMU-SAFARI / BEER

tukl-msd / DRAMSpec

dovedevic / blimp

CMU-SAFARI / CLRDRAM

saiteja-talluri / Microarchitectural-attacks

CMU-SAFARI / EINSim

adarshpatil / dve

CMU-SAFARI / HARP

comsec-group / REM

ppieczul / c386sx-lt-2mb-memory-module

wgurecky / bipymc

CMU-SAFARI / DRAM-Datasheet-Survey

cdslaborg / paramontex

CMU-SAFARI / DIVA-DRAM

CMU-SAFARI / DRAM-Voltage-Study

johnzl-777 / DRAMutils

pjattke / awesome-rowhammer

adarshpatil / gem5gpu-hashcache

Stephen-Arsenault / DRAM-Liberator

5ayam5 / COL216-Minor

gaomy3832 / energydram

jtsimons / DRAMC

lmartorella / dram-tester

mohin7 / dramkit1

NamhoGim / Master_thesis

ThexXTURBOXx / Raspberry-Pi-DRAM-PUF

olemon111 / SWP-Tree-BG2