Microelectronic Systems Design Research Group

DRAMSys

DRAMSys a SystemC TLM-2.0 based DRAM simulator.

DRAMPower

Fast and accurate DRAM power and energy estimation tool

gem5.TnT

gem5 Tips & Tricks

DRAMSpec

A High-Level DRAM Timing, Power and Area Exploration Tool

LSTM-PYNQ

gem5.bare-metal

This shows a simple ARM bare-metal software implementation for gem5

finance.zynqpricer.hls

Heston implementation for Zynq with Vivado HLS

DRAMPetri

Modelling DRAMs with Petrinets

RRAMSpec

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

DRAMUtils

Utility repository for DRAMSys and DRAMPower

finance.americanoption.zynq.hls

median.demonstrator

Median filter demonstrator on ZynqBerry

systemc.visualizer

Visualizes SystemC Simulation Structure by Generating a ELK file

Hardware_Exploration_Framework

Hardware Exploration Framework Sustain ML project

msdlib.loopy

the Loopy hardware-in-the-loop framework

msdlib.vhdl

VHDL helper library with generic components and helper functions

finance.benchmark

executable benchmark for evaluating option pricing systems

gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

IceWrapper

IceWrapper - A SystemC Wrapper for 3D-ICE

bigdata.nn.ocr

OCR with neural networks

hls-2dlstm

HLS Library of 2D-LSTM Neural Network

median.demonstrator.internal

Zynqberry content for median filter demonstrator

pytorch-2dlstm

PyTorch Implementation of 2D-LSTM Neural Network

DRAMX-Sec

DRAM Cross Section for LTSpice

median.demonstrator.linux-xlnx

The official Linux kernel from Xilinx

median.demonstrator.u-boot-xlnx

The official Xilinx u-boot repository

simexpal

Simplifying Experimental Algorithmics

systemc-scons

A SystemC fork with a scons build system

templateTypes

Base class of types which will be used in several projects