flip-flop

There are 1 repository under flip-flop topic.

LogiJS
SimonBuxx / LogiJS
Discover and create logic circuits
logic-gates logic-circuit logic simulator boolean electronics cpu flip-flop gates logic-circuits
Language:JavaScript 42
mattvenn / flipflop_demo
Flip flop setup, hold & metastability explorer tool
flip-flop metastability ngspice simulation sky130
Language:Jupyter Notebook 29
FarshidKeivanian / Multi-objective-optimization-of-MOSFETs-channel-widths-and-supply-voltage-in-the-proposed-dual-edge-
FuzzyNSGA-II-Algorithm (Fuzzy adaptive optimisation method)
d-flipflop flip-flop flip-flops fuzzy-logic fuzzy-sets genetic-algorithm genetic-algorithms hspice hspice-model mosfet mosfet-transistor mosfets non-dominated-solutions non-dominated-sorting non-dominating-sorting nsga-ii nsga2 power fnsga-ii fuzzy-nsga-ii
Language:MATLAB 7
hosseinfani / digital_odyssey
Materials for the Computer Science course, Digital Design (Logic Circuits)
digital-design logic-circuits digital-systems number-systems boolean-algebra logic-gates canonical-forms karnaugh-map combinational-logic adder subtractor multiplexer sequential-logic flip-flop registers shift-register counter memory programmable-logic decoding
Language:C++ 7
JanBurp / MorphaLogic
An eurorack logic module with several logic functions and a clock divider mode. Build around an arduino nano. So could be reprogrammed.
clock-divider eurorack logic morphagene flip-flop logic-gates cpp
Language:C++ 6
JoelRomero97 / Sistemas-Digitales
Implementaciones para diseño de sistemas digitales, comenzando por Flip Flops, registros, autómatas (Máquinas de Moore y Máquinas de Mealy), memorias ROM y sensores de presencia, utilizando para cada uno de estos, distintos contadores (anillo, década, etc).
vhdl galaxy galaxy-project flip-flop registro contador counter moore-to-mealy mealy-machine moore-machine constants ipn escom marquesina secuenciales gal22v10 rom-memories digital-design
Language:VHDL 6
GSimas / EEL5105
💻 Repositório para Disciplina EEL5105 - Circuitos e Técnicas Digitais - UFSC
vhdl quartus digital circuits techniques language hardware description multisim multiplexer counter timer clock latch flip-flop register fsm machine sequential combinational
Language:VHDL 2
NegarMirgati / Latch_and_FF_Analysis
Latch and Flip Flop Analysis Using Hspice
latch flip-flop hspice
Language:SourcePawn 2
sedhossein / verilog-bcd-counter-jk-flip-flop
this source is Commercial bcd counter that built with Jk flip-flop in verilog
verilog flip-flop bcd counter logic
Language:Verilog 2
AWESOME04 / Digital-Systems-Design
This GitHub repository contains coursework projects related to computer systems design. It includes various assignments and projects that cover topics such as digital logic design, computer architecture, and hardware description languages.
computer-systems logic-circuit vdhl comparator flip-flop multiplexer
Language:VHDL 1
imvickykumar999 / Logical-Redstone-Reloaded
Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/
binary clock combinational-circuit cycle flip-flop full-adder half-adder latch memory minecraft-resourcepack ram redstone rom sequential-circuit ticks world full-subtractor half-subtractor
Language:Python 1
microchip-pic-avr-examples / avr128db48-blink-led-ccl-mplab-mcc
This MPLAB X Melody code example shows how to make an LED blink using the Configurable Custom Logic (CCL) found in the AVR® DB. The CCL is configured as a toggling J-K flip-flop. The toggling is a result of a timer event.
curiosity-nano flip-flop led melody
Language:C 1
anthony7586 / designing-with-VHDL
porject from designing with VHDL course. Includes, FSM (finite state machine), next state logic,seven-segment-display-decode, full adder, flip flops, D_flip-flops, ripple carry adder, full adder, half adder, delay propagation
adder-subtractor battleship battleship-game delay finite-state-machine flip-flop flip-flops fsm fulladder ripple-carry-adder seven-segments-display vhdl delay-propogation next-state-logic
0
flip-flop
dm9gp / flip-flop
Astable Flip-Flop Circuit PCB. View the schematics, inspect or modifiy the circuit, print it.
astable flip-flop multivibrator pcb fritzing
0
GokuGhoul / Embd-iverilog
Embedded Systems Lab Work
embedded-systems iverilog encoder-decoder flip-flop adder counter logic-gates
Language:Verilog 0
Grv-Singh / Digital-Systems-Design
Playing with ⚡ logic gates to make corresponding ✔ decision making circuits solving 🔌 electronic challenges at hand 🚦
logic-gates logical-programming flip-flop adder half-adder full-adder sine decison-circuits electronics-engineering
Language:MATLAB 0
archy-co / IC_Testers
Testers for some non elementary integrated circuits: Adder 74283, D Flip-Flop 74174 & Counter 74193 written to be run from PSoC 4
integrated-circuits psoc psoc4 flip-flop full-adder tester
Language:C
daedalus / bitlogicemu
bitwise operation examples
alu flip-flop lfsr half-adder muxer rot register mips binary
Language:Python
MartinCastroAlvarez / assembly-logisim-circuits
Logic Circuits using Logisim
logisim flip-flop circuit gates
Language:Assembly
memgonzales / hdl-flip-flop
Compilation of Verilog behavioral models and test benches for the four types of flip-flops (SR, JK, D, and T)
verilog flip-flop computer-architecture sequential-circuits behavioral-modeling
Language:Verilog
newajsharif91 / Verilog_HDL_Digital-System-Design
CSE-2112 Digital Syatem Design LAb
adder d-flipflop flip-flop full-adder half-adder verilog
Language:Verilog
nihal-ramaswamy / DDCO-project
A simple up-down counter project made using icarus verilog as a part of the Digital Design and Computer Organization course (UE19CS207) at PES University.
digital-design pes gtkwave circuits counter icarus-verilog sequential flip-flop
Language:Verilog
talhatallat / Electronics
fpga-board fpga-programming time-base-circuit nand-cell flip-flop 8-bit-adder combinational-logic comparator vivado verilog

flip-flop

SimonBuxx / LogiJS

mattvenn / flipflop_demo

FarshidKeivanian / Multi-objective-optimization-of-MOSFETs-channel-widths-and-supply-voltage-in-the-proposed-dual-edge-

hosseinfani / digital_odyssey

JanBurp / MorphaLogic

JoelRomero97 / Sistemas-Digitales

GSimas / EEL5105

NegarMirgati / Latch_and_FF_Analysis

sedhossein / verilog-bcd-counter-jk-flip-flop

AWESOME04 / Digital-Systems-Design

imvickykumar999 / Logical-Redstone-Reloaded

microchip-pic-avr-examples / avr128db48-blink-led-ccl-mplab-mcc

anthony7586 / designing-with-VHDL

dm9gp / flip-flop

GokuGhoul / Embd-iverilog

Grv-Singh / Digital-Systems-Design

archy-co / IC_Testers

daedalus / bitlogicemu

MartinCastroAlvarez / assembly-logisim-circuits

memgonzales / hdl-flip-flop

newajsharif91 / Verilog_HDL_Digital-System-Design

nihal-ramaswamy / DDCO-project

talhatallat / Electronics