mattvenn

matt venn's repositories

zero_to_asic_mpw4

Language:VerilogApache-2.013 4 1

simulate-gate

Project 1.1 Simulate a Skywater 130nm standard cell using ngspice

Language:MakefileApache-2.011 40

klayout_properties

Language:Ruby7 30

project0_test

Project 0 CI

7 4 1

zero-to-asic-www

Language:HTML5 3 4

tt06-analog-r2r-dac

Language:VerilogApache-2.0400

tt07-mos-bandgap

Language:TclApache-2.04 30

tt-fpga-demo

Language:TclApache-2.0200

tt06-analog-relax-osc

Language:MakefileApache-2.02 20

tt07-twin-tee-opamp-osc

Language:VerilogApache-2.02 2 2

analog_course_components

Language:Tcl1 10

caravel_board

Language:C1 10

tt-vga-clock-firmware

TinyTapeout demo pcb's RP2040 functionality

Language:PythonLGPL-2.1100

tt07-vga-clock

Language:VerilogApache-2.0100

caravel_timer_demo

Language:VerilogApache-2.0000

magic_challenge

Language:MakefileApache-2.0020

tiny_tapeout

Tiny_tapeout of 2024

Language:TclApache-2.0000

tt05-analog-test

voltage divider

Language:VerilogApache-2.0000

tt06-analog-dac

Language:TclApache-2.0020

tt06-analog-test

Language:TclApache-2.0000

tt06-fet-opamp

Language:MakefileApache-2.0000

tt06-inverter

Language:TclApache-2.0020

tt06-logic-puzzle

Language:TclApache-2.0000

tt06-mattw-practice

Submission template for Tiny Tapeout 06 - Verilog HDL Projects

Apache-2.0000

tt06-mw-pmic

Language:VerilogApache-2.0000

tt06-rgb-mixer

Language:VerilogApache-2.0000

tt06-wokwi-test

Language:TclApache-2.0020

tt07-mixer

Simple Gilbert cell mixer asic

Language:VerilogApache-2.0000

tt_resistor_test

Language:VerilogApache-2.0000

visa-tek

scripts using visa for tek ms02004b scope

Language:Python020