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FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
Logic circuit analysis and optimization
A prototype of Concolic Testing engine for SystemVerilog, developed as part of PFN summer internship 2018.
Combinational ATPG generator based on D-Algorithm
2023 VLSI Testing Final Project
Generate ATPG for fault detection on Verilog circuits. C++/QT
Scan insertion and design of a LBIST wrapper for a RISC-V core for stuck-at fault model
Algorithm that extracts a circuit from a netlist and performs fault collapsing
Raspberry Pi 4 is used to drive ATPG stuck-at patterns to an IC. Python is used to drive the patterns and check for expected levels on the scan_out pins (4 chains in this example). A Perl script is used to parse the ATP pattern data into Python lists (I prefer to parse text files using Perl).
Source files and documentation for the final assignment of the "Testing and Fault Tolerance" course.
Fault Simulation | Parallel Fault Simulation | Deductive fault Simulation | Test Coverage
Simple EDA tool for fault reduction and testing for combinational circuits
Path-Oriented Decision Making (PODEM) algorithm for Automatic Test Pattern Generation (ATPG).
Post-manufacturing test analysis