There are 2 repositories under phy topic.
Open-sourced DDR3 controller
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
An HDL design for sending data over Ethernet
Open Sigfox Stack Reference Implementation - Physical Layer for SDR
Let's see how fast and accurate we could detect 5G NR slot boundary
Go package for parsing Source Engine StudioModel formats (.mdl, .vtx, .vvd, .phy)
Plugins to Phy1 - additional features to Phy
Python module for 5G NR sync signals and decoding.
External PHY RTL8201F with HR871181A
External PHY RTL8201F with switch RTL8305NB and 2xHR871181A
Neural Signal Analysis
Analysis of physical layer security of MIMO system using Machine Learning algorithms vs theoretical best
BRAVE is a collaborative research project started in January 2018, that aims at creating new physical-layer (PHY) techniques devoted to beyond-5G wireless communications. The partners (Siradel, Central-Supélec, CEA-Leti and ANFR) are designing new high-data-rate and energy-efficient waveforms that operate in frequencies above 90 GHz. Application to scenarios such as kiosks, backhauling, hotspots are assessed to evaluate the benefit of the proposed technology. http://www.brave-beyond5g.com/
LibreLoRa: GNURadio Based LoRa PHY receiver and transmitter implementations. This is just a mirror, main repo at: https://gitlab.com/jpsimas/librelora
Converts moutainsorted clusters to phy for curation using SpikeInterface. Includes a plugin to add mountainsort cluster metrics to phy.
P8X32A/Propeller, P2X8C4M64P/Propeller 2 driver object for the ENC28J60 Ethernet Controller
P2X8C4M64P/Propeller 2 driver object for the LAN8720 Ethernet PHY
Everything you need to know on how to connect the LAN8720 PHY to the ESP32.