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A small SoC with a pipeline 32-bit RISC-V CPU.
同济大学CS《计算机系统实验》实验二TongJi University CS computer system experiment assignment 2《自己动手写 CPU》SOPC实现与操作系统移植
Matrix multiplication on multiple Nios II cores
Project for FPGA, VHDL and SoPC course at hepia