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VHDL implementation of a 1 Hz single cycle CPU that supports recursive function calls
Software for DE2Bot, an autonomous robot controlled by an FPGA
The first lab of the course, ECE 5760
This repository has the proporse to simulate a real clock on Altera DE2 board, with a real time alarm, using VHDL language.
My FPGA practices on Altera-DE2-115 board with Verilog