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Apache NiFi 1.5/1.6/1.9.2+ Processor to produce DDL
Apache NiFi 1.10 DJL
This is A NiFi processor Created to Stream the contents of a FlowFile to Ignite Cache.
A custom processor implemented in Verilog HDL for image down sampling for UOM's EN3030 Circuits and Systems Design module ❄
An assembler for the SPU using rust
A new EPU, completely virtual, in the browser
This repository contains the CENG3010 Computer Organization course projects. The first project involves developing a GUI-based 32-bit MIPS simulator, while the second project centers on designing a custom 16-bit MIPS-like processor with a unique instruction set.
Custom nifi kinesis get processor