Domipheus / ArtyS7-RPU-SoC

Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.

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fpga fpga-soc firmware c vhdl vivado xilinx-vivado risc-v riscv riscv32 hdmi dvid spi apache2

ArtyS7-RPU-SoC

Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.

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Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.

fpga fpga-soc firmware c vhdl vivado xilinx-vivado risc-v riscv riscv32 hdmi dvid spi apache2

Apache License 2.0

Languages

Language:VHDL 81.7%Language:Coq 14.7%Language:Verilog 2.5%Language:SystemVerilog 0.9%Language:Tcl 0.1%Language:C 0.1%Language:Batchfile 0.0%Language:Pascal 0.0%Language:Assembly 0.0%