Beast code in Giters

Colin Riley's repositories

RPU

Basic RISC-V CPU implementation in VHDL.

Language:VHDLApache-2.0157 16 2

TPU

TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. Designed to run on miniSpartan6+.

Language:VHDL138 19 1

ArtyS7-RPU-SoC

Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.

Language:VHDLApache-2.036 50

TeensyZ80

Code and related parts of the TeensyZ80 project.

Language:Arduino32 10 1

ArtyS7

Where Arty S7 projects are kept. MIT License unless file headers state otherwise.

Language:VHDLMIT22 6 2

UART

Simple UART implementation in VHDL

Language:VHDL12 3 1

misc

General things not associated with a particular project.

6 20

miniSpartan3

Projects for the miniSpartan3 board from Scarab Hardware

Language:VHDL2 20

riscv-compliance

Language:CBSD-3-Clause2 10

BenchPower1

Schematics, Firmware & Simulations for a simple linear Bench Power Supply

Language:IDLNOASSERTION1 20

SDDatalogger1

A 4-channel analog SD Card datalogger with RTC

Language:ArduinoNOASSERTION1 20