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litex

Build your hardware, easily!

Language:CNOASSERTION3115 99 839

litepcie

Small footprint and configurable PCIe core

Language:PythonNOASSERTION496 29 68

litedram

Small footprint and configurable DRAM core

Language:PythonNOASSERTION387 24 164

liteeth

Small footprint and configurable Ethernet core

Language:PythonNOASSERTION218 19 69

litescope

Small footprint and configurable embedded FPGA logic analyzer

Language:PythonNOASSERTION170 16 23

pcie_screamer

PCIe Screamer - TLPs experiments...

Language:CBSD-2-Clause166 20 10

litesata

Small footprint and configurable SATA core

Language:PythonNOASSERTION132 18 17

litesdcard

Small footprint and configurable SDCard core

Language:PythonNOASSERTION112 14 13

colorlite

Take control of your Colorlight FPGA board with LiteX/LiteEth :)

Language:PythonBSD-2-Clause96 9 9

litex_m2sdr

LiteX based M2 SDR FPGA board.

Language:CBSD-2-Clause76 11 38

litex-acorn-baseboard

LiteX development baseboards arround the SQRL Acorn.

Language:PythonNOASSERTION57 15 11

liteiclink

Small footprint and configurable Inter-Chip communication cores

Language:PythonNOASSERTION54 11 10

litejesd204b

Small footprint and configurable JESD204B core

Language:PythonNOASSERTION40 4 6

litex_rp2040_pmod_test

Test of a RP2040 PMOD attached to a LiteX SoC.

Language:Python25 5 1

xtrx_julia

XTRX LiteX/LitePCIe based design for Julia Computing

Language:CBSD-2-Clause25 7 13

thunderscope

LiteX based FPGA gateware for Thunderscope.

Language:Python23 7 12

litex_hw_ci

LiteX Hardware CI tests.

Language:Python9 4 17

openFPGALoader

Universal utility for programming FPGA

Language:C++Apache-2.07 10

litepcie_ptm_test

LitePCIe PTM support / test repo.

Language:Python6 6 11

litex_openwrt_test

Test of OpenWRT on LiteX SoCs.

Language:CNOASSERTION4 2 2

litex_agilex5_test

Initial Test/Support of LiteX on Intel Agilex5 FPGAs.

Language:Python3 4 16

vhdl2doc

Language:JavaScript3 20

HectaScope

Language:PythonMIT200

litex_mister_test

Simplification test of MiSTer with LiteX to try to help/contribute to MiSTeX project.

Language:Verilog2 3 9

CTU-CAN-FD

This is a mirror repository for official CTU CAN FD repository:

NOASSERTION100

LimeSDR-XTRX_LiteX_GW

Language:Python107

litex_64bit_addressing_test

Test/PoC of 64-bit addressing in LiteX.

Language:Python1 3 4

litex_xtrx

XTRX LiteX/LitePCIe based alternative Gateware/Software.

Language:C++BSD-2-Clause100

openfpga-pong

FPGA Pong implementation, specifically for the Analogue Pocket

Language:VerilogMIT1 10

openocd

Spen's Official OpenOCD Mirror (no pull requests)

Language:CGPL-2.01 20