Giters
enjoy-digital
/
litesata
Small footprint and configurable SATA core
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Stargazers:
120
Watchers:
18
Issues:
16
Forks:
33
enjoy-digital/litesata Issues
Improve Ultrascale(+) PHYs naming.
Updated
5 months ago
Working linux driver
Closed
6 months ago
Comments count
1
LiteSATA Bench not initializing on Nexys Video
Updated
9 months ago
Add/Finish ECP5 support.
Updated
10 months ago
Comments count
3
Add IRQs to notify SATA connect/disconnect and end of DMAs
Updated
2 years ago
how is the serial port used?
Closed
3 years ago
Comments count
1
Feedback / Contribution / Support
Updated
3 years ago
Switch PHYs to LiteICLink
Closed
4 years ago
Comments count
2
Understand why set_reset_less can't be used in streams.
Updated
4 years ago
Artix7: Allow use without 150MHz refclk.
Closed
4 years ago
Comments count
1
Add DMA frontend
Closed
4 years ago
Comments count
1
Add Artix7 support
Closed
4 years ago
Comments count
2
Zero delay oscillations in Vivado XSIM simulation
Closed
4 years ago
Comments count
3
reported broken with LiteX > 6a7604cbb06454813541bc308791e90e051555af
Closed
6 years ago
Comments count
1
Need to repeat last primitive after an ALIGN when sending CONT
Closed
8 years ago
Comments count
1
adapt simulations to new simulator
Closed
8 years ago
Comments count
2