tanbour's repositories
Formal_Verification
Coverage Closure and Bug Hunt Project
antikernel
The Antikernel operating system project
antikernel-ipcores
FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
Design-Verification
Course content for the University of Bristol Design Verification course.
Exploring-Zynq-MPSoC-CN
Exploring Zynq ® MPSoC Chinese
FPGA-FOC
FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器,用于驱动BLDC/PMSM电机。
Language:Verilog000
fpga_pio
An attempt to recreate the RP2040 PIO in an FPGA
BSD-2-Clause000
Functional-Safety-Notes
基于Xilinx平台的功能安全笔记
000
gen_amba_2021
AMBA bus generator including AXI4, AXI3, AHB, and APB
Language:CNOASSERTION000
Language:PythonLGPL-3.0000
QSPI_FOR_SOC
QSPI for SoC
Language:VerilogApache-2.0000
rggen-verilog
Verilog writer plugin for RgGen
Language:RubyMIT000
UART_VLC_Transmission
UART (9600/115200) to VLC (RS code/Manchester code/8x Sampling Syncronization)
wujian100_open
IC design and development should be faster,simpler and more reliable