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tanbour / antikernel-ipcores

FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations

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antikernel-ip

FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations

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FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations

License:BSD 3-Clause "New" or "Revised" License

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Language:SystemVerilog 50.5%Language:Verilog 49.5%