saramkhalaf / engr378

These labs were conducted during our Digital systems elective course were we were instructed to build Verilog code for specific logic design and verify it on Quartus modalism and on the FPGA. Skills developed: writing Verilog code structurally and behaviorally, testing, simulation, writing test benches and using the FPGA

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digital design verilog fpga fpga-programming verilog-code digitallogic simulation modelsim altera-fpga testbenches

engr378-lab

All of the lab stuff is stored here

Alvin Guan

Sara Kalaf

San Francisco State University

ENGR 378-04

Spring 2020

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digital design verilog fpga fpga-programming verilog-code digitallogic simulation modelsim altera-fpga testbenches

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Language:Verilog 78.8%Language:Stata 11.4%Language:HTML 6.1%Language:C 2.8%Language:Standard ML 0.6%Language:Scheme 0.3%