tape-out

There are 0 repository under tape-out topic.

• RISC-V-CPU

  jasonlin316 / RISC-V-CPU

  A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.

  risc-vriscv32gate-levelplace-and-routevectorprocessorchiptape-outverilog
  Language:Verilog 134