piso
There are 0 repository under piso topic.
tikene / Bot-Idealista
Mensajea automáticamente a los usuarios en un tablón de idealista
Language:Python 3mnmhdanas / Parallel-IN-Serial-OUT
In this shift register, we can apply the parallel inputs to each D flip-flop by making Preset Enable to 1. For every positive edge triggering of clock signal, the data shifts from one stage to the next. So, we will get the serial output from the right most D flip-flop.
Language:Verilog 1- Language:PHP 0
- Language:HTML 0
levyashvin / verilog_codes
basic implementation of logic structures using verilog (revising github)
Language:Verilog 0sikderAmit / piso-uvm-verification
This repository contain all the necessary files to verify PISO Universal Register
Language:SystemVerilog 0SuhailAhamed2000 / PISO
The shift register, which allows parallel input (data is given separately to each flip flop and in a simultaneous manner) and produces a serial output is known as Parallel-In Serial-Out shift register.
Language:Verilog 0
