Miodrag Milanović (mmicko)

mmicko

Geek Repo

Location:Novi Sad, Serbia

Twitter:@micko_mame

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Organizations
mamedev
YosysHQ

Miodrag Milanović's starred repositories

drogon

Drogon: A C++14/17/20 based HTTP web application framework running on Linux/macOS/Unix/Windows

yosys

Yosys Open SYnthesis Suite

contour

Modern C++ Terminal Emulator

Language:C++License:Apache-2.0Stargazers:2278Issues:19Issues:660

logicanalyzer

24 channel, 100Msps logic analyzer hardware and software

Language:C#License:GPL-3.0Stargazers:1663Issues:56Issues:66

awesome-dear-imgui

A collection of awesome dear imgui bindings, extensions and resources

glibc_version_header

Build portable Linux binaries without using an ancient distro

Language:C++License:MITStargazers:781Issues:27Issues:25

oss-cad-suite-build

Multi-platform nightly builds of open source digital design and verification tools

Language:PythonLicense:ISCStargazers:699Issues:26Issues:85

gtkwave

GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.

Language:CLicense:GPL-2.0Stargazers:557Issues:19Issues:212

prjtrellis

Documenting the Lattice ECP5 bit-stream format.

Language:PythonLicense:NOASSERTIONStargazers:383Issues:34Issues:69

mipi_csi_receiver_FPGA

MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy Version!

fluxengine

PSOC5 floppy disk imaging interface

Language:C++License:MITStargazers:342Issues:35Issues:339

RapidWright

Build Customized FPGA Implementations for Vivado

Language:JavaLicense:NOASSERTIONStargazers:271Issues:26Issues:244

prjoxide

Documenting Lattice's 28nm FPGA parts

Language:PythonLicense:ISCStargazers:140Issues:17Issues:18

rust-linux-darwin-builder

Use the same Docker image to cross-compile Rust x86_64/ARM64 programs for Linux and macOS (osxcross).

Language:DockerfileLicense:Apache-2.0Stargazers:107Issues:5Issues:17

mistral

Cyclone V bitstream reverse-engineering project

Language:HTMLLicense:BSD-3-ClauseStargazers:105Issues:25Issues:13

abn6502

Solving the global IC shortage by reusing old stuff!

Language:AssemblyLicense:NOASSERTIONStargazers:76Issues:5Issues:0

HexeTerminal

Library for embedding Terminal Emulators

Language:C++License:NOASSERTIONStargazers:38Issues:3Issues:5

LunaPnR

LunaPnR is a place and router for integrated circuits

Language:VerilogLicense:GPL-3.0Stargazers:37Issues:6Issues:5

MicroBeast

An 8-bit Z80 computer kit in a box

Language:AssemblyLicense:MITStargazers:34Issues:3Issues:7

PCI2Nano-PCB

An FPGA/PCI Device Reference Platform

Language:VerilogLicense:CC-BY-SA-4.0Stargazers:30Issues:5Issues:0

RPTerm

Serial Terminal Firmware for RP2040 Boards

Language:C++License:MITStargazers:17Issues:0Issues:0

rp2040-pmod

RP2040 MCU based PMOD

Language:HTMLLicense:MITStargazers:17Issues:2Issues:0

setup-oss-cad-suite

Set up your GitHub Actions workflow with a OSS CAD Suite

Language:TypeScriptLicense:ISCStargazers:13Issues:8Issues:5

lowe

Löwe FPGA Board

Language:VerilogLicense:CERN-OHL-P-2.0Stargazers:12Issues:2Issues:0
Language:CLicense:GPL-3.0Stargazers:11Issues:0Issues:0

Modular

My Modular Z80 Homebrew Computer

Language:GLSLStargazers:11Issues:3Issues:0

Anlogic_AL3-10_Analyzing

An attempt to reverse engineer a bitstream made for an AL3-10 FPGA

Language:CLicense:GPL-3.0Stargazers:10Issues:0Issues:0

scy

Sequence of Covers with Yosys

Language:SystemVerilogLicense:NOASSERTIONStargazers:5Issues:10Issues:3

kicadtoverilog

Export from Hierachical KiCad 6 schematic to Verilog

Language:PythonStargazers:3Issues:2Issues:0