Yosys Headquarters's repositories
oss-cad-suite-build
Multi-platform nightly builds of open source digital design and verification tools
prjtrellis
Documenting the Lattice ECP5 bit-stream format.
riscv-formal
RISC-V Formal Verification Framework
VlogHammer
A Verilog Synthesis Regression Test
prjpeppercorn
Project Peppercorn - GateMate FPGA Bitstream Documentation
setup-oss-cad-suite
Set up your GitHub Actions workflow with a OSS CAD Suite
prjtrellis-db
Project Trellis database
prjpeppercorn-test-cases
Project Peppercorn GateMate Test Cases
rtlil-mlir
Yosys RTLIL dialect for MLIR
yosyshq.github.io
www.yosyshq.net
yosys-manual-build
Yosys manual