Giters
gatecat
/
prjoxide
Documenting Lattice's 28nm FPGA parts
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Stargazers:
143
Watchers:
18
Issues:
18
Forks:
15
gatecat/prjoxide Issues
`prjoxide pack` fails for PLL on LIFCL-17
Closed
7 months ago
Comments count
1
ERROR: Cell type 'PCLKDIV' instantiated as 'U$$0' is not supported by this device.
Updated
8 months ago
Unclear Error Message - High Performance Banks
Closed
8 months ago
Comments count
3
Possible mistake in D-PHY routing
Closed
a year ago
main router loop running indefinitely
Updated
a year ago
Comments count
2
Interface Not Read Correctly
Closed
a year ago
Comments count
1
How to use Nexus memory modules?
Closed
2 years ago
Comments count
4
Could NOT find Boost (missing: iostreams) (f ound version "1.71.0")
Closed
2 years ago
incorrect IDCode with LIFCL-40-8BG400CES device
Closed
2 years ago
Comments count
4
make: nextpnr-nexus: No such file or directory
Closed
2 years ago
Comments count
1
Crosslink VIP example - Incorrect device ID
Closed
2 years ago
Comments count
2
SEDC support?
Updated
2 years ago
Comments count
4
build prjoxide with new rustc from homebrew package
Closed
3 years ago
Comments count
3
Are you looking for help with PCIe fuzzing?
Updated
3 years ago
Comments count
2
Question: can I get the git hash that a prjoxide executable was built at?
Updated
3 years ago
Comments count
1
Litex SoC does not boot on CrossLink-NX-17 with certain clock divisors (works in Radiant)
Updated
3 years ago
Comments count
12
error with LRAM initial values on LIFCL-17: no IP named LRAM_CORE_R11C0
Closed
3 years ago
Comments count
8
Building nextpnr looking for database files?
Closed
4 years ago
Comments count
3